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@@ -511,6 +511,13 @@
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clock-div = <8>;
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clock-mult = <1>;
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};
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+ rcan_clk: rcan {
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+ compatible = "fixed-factor-clock";
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+ clocks = <&pll1_div2_clk>;
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+ #clock-cells = <0>;
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+ clock-div = <49>;
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+ clock-mult = <1>;
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+ };
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/* Gate clocks */
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mstp1_clks: mstp1_clks@e6150134 {
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@@ -572,7 +579,8 @@
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reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
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clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
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<&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
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- <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>;
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+ <&cp_clk>, <&cp_clk>, <&p_clk>, <&p_clk>,
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+ <&cp_clk>, <&cp_clk>;
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#clock-cells = <1>;
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clock-indices = <
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R8A7792_CLK_GPIO7 R8A7792_CLK_GPIO6
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@@ -580,12 +588,14 @@
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R8A7792_CLK_GPIO3 R8A7792_CLK_GPIO2
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R8A7792_CLK_GPIO1 R8A7792_CLK_GPIO0
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R8A7792_CLK_GPIO11 R8A7792_CLK_GPIO10
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+ R8A7792_CLK_CAN1 R8A7792_CLK_CAN0
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R8A7792_CLK_GPIO9 R8A7792_CLK_GPIO8
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>;
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clock-output-names =
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"gpio7", "gpio6", "gpio5", "gpio4",
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"gpio3", "gpio2", "gpio1", "gpio0",
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- "gpio11", "gpio10", "gpio9", "gpio8";
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+ "gpio11", "gpio10", "can1", "can0",
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+ "gpio9", "gpio8";
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};
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};
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@@ -604,4 +614,12 @@
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/* This value must be overridden by the board. */
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clock-frequency = <0>;
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};
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+
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+ /* External CAN clock */
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+ can_clk: can {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ /* This value must be overridden by the board. */
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+ clock-frequency = <0>;
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+ };
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};
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