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@@ -30,6 +30,65 @@
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clock-frequency = <19200000>;
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};
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+ timer@f9020000 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+ compatible = "arm,armv7-timer-mem";
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+ reg = <0xf9020000 0x1000>;
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+ clock-frequency = <19200000>;
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+
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+ frame@f9021000 {
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+ frame-number = <0>;
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+ interrupts = <0 8 0x4>,
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+ <0 7 0x4>;
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+ reg = <0xf9021000 0x1000>,
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+ <0xf9022000 0x1000>;
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+ };
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+
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+ frame@f9023000 {
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+ frame-number = <1>;
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+ interrupts = <0 9 0x4>;
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+ reg = <0xf9023000 0x1000>;
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+ status = "disabled";
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+ };
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+
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+ frame@f9024000 {
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+ frame-number = <2>;
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+ interrupts = <0 10 0x4>;
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+ reg = <0xf9024000 0x1000>;
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+ status = "disabled";
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+ };
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+
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+ frame@f9025000 {
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+ frame-number = <3>;
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+ interrupts = <0 11 0x4>;
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+ reg = <0xf9025000 0x1000>;
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+ status = "disabled";
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+ };
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+
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+ frame@f9026000 {
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+ frame-number = <4>;
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+ interrupts = <0 12 0x4>;
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+ reg = <0xf9026000 0x1000>;
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+ status = "disabled";
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+ };
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+
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+ frame@f9027000 {
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+ frame-number = <5>;
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+ interrupts = <0 13 0x4>;
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+ reg = <0xf9027000 0x1000>;
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+ status = "disabled";
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+ };
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+
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+ frame@f9028000 {
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+ frame-number = <6>;
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+ interrupts = <0 14 0x4>;
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+ reg = <0xf9028000 0x1000>;
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+ status = "disabled";
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+ };
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+ };
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+
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restart@fc4ab000 {
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compatible = "qcom,pshold";
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reg = <0xfc4ab000 0x4>;
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