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@@ -11,6 +11,7 @@
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* warranty of any kind, whether express or implied.
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*/
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+#include <linux/atomic.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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@@ -112,11 +113,18 @@ struct octeon_i2c {
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wait_queue_head_t queue;
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struct i2c_adapter adap;
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int irq;
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+ int hlc_irq; /* For cn7890 only */
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u32 twsi_freq;
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int sys_freq;
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void __iomem *twsi_base;
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struct device *dev;
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bool hlc_enabled;
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+ void (*int_enable)(struct octeon_i2c *);
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+ void (*int_disable)(struct octeon_i2c *);
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+ void (*hlc_int_enable)(struct octeon_i2c *);
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+ void (*hlc_int_disable)(struct octeon_i2c *);
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+ atomic_t int_enable_cnt;
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+ atomic_t hlc_int_enable_cnt;
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};
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static void octeon_i2c_writeq_flush(u64 val, void __iomem *addr)
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@@ -216,6 +224,58 @@ static void octeon_i2c_int_disable(struct octeon_i2c *i2c)
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octeon_i2c_write_int(i2c, 0);
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}
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+/**
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+ * octeon_i2c_int_enable78 - enable the CORE interrupt
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+ * @i2c: The struct octeon_i2c
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+ *
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+ * The interrupt will be asserted when there is non-STAT_IDLE state in the
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+ * SW_TWSI_EOP_TWSI_STAT register.
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+ */
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+static void octeon_i2c_int_enable78(struct octeon_i2c *i2c)
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+{
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+ atomic_inc_return(&i2c->int_enable_cnt);
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+ enable_irq(i2c->irq);
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+}
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+
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+static void __octeon_i2c_irq_disable(atomic_t *cnt, int irq)
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+{
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+ int count;
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+
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+ /*
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+ * The interrupt can be disabled in two places, but we only
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+ * want to make the disable_irq_nosync() call once, so keep
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+ * track with the atomic variable.
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+ */
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+ count = atomic_dec_if_positive(cnt);
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+ if (count >= 0)
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+ disable_irq_nosync(irq);
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+}
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+
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+/* disable the CORE interrupt */
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+static void octeon_i2c_int_disable78(struct octeon_i2c *i2c)
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+{
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+ __octeon_i2c_irq_disable(&i2c->int_enable_cnt, i2c->irq);
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+}
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+
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+/**
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+ * octeon_i2c_hlc_int_enable78 - enable the ST interrupt
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+ * @i2c: The struct octeon_i2c
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+ *
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+ * The interrupt will be asserted when there is non-STAT_IDLE state in
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+ * the SW_TWSI_EOP_TWSI_STAT register.
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+ */
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+static void octeon_i2c_hlc_int_enable78(struct octeon_i2c *i2c)
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+{
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+ atomic_inc_return(&i2c->hlc_int_enable_cnt);
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+ enable_irq(i2c->hlc_irq);
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+}
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+
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+/* disable the ST interrupt */
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+static void octeon_i2c_hlc_int_disable78(struct octeon_i2c *i2c)
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+{
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+ __octeon_i2c_irq_disable(&i2c->hlc_int_enable_cnt, i2c->hlc_irq);
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+}
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+
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/*
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* Cleanup low-level state & enable high-level controller.
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*/
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@@ -262,7 +322,18 @@ static irqreturn_t octeon_i2c_isr(int irq, void *dev_id)
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{
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struct octeon_i2c *i2c = dev_id;
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- octeon_i2c_int_disable(i2c);
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+ i2c->int_disable(i2c);
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+ wake_up(&i2c->queue);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+/* HLC interrupt service routine */
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+static irqreturn_t octeon_i2c_hlc_isr78(int irq, void *dev_id)
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+{
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+ struct octeon_i2c *i2c = dev_id;
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+
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+ i2c->hlc_int_disable(i2c);
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wake_up(&i2c->queue);
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return IRQ_HANDLED;
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@@ -283,10 +354,10 @@ static int octeon_i2c_wait(struct octeon_i2c *i2c)
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{
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long time_left;
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- octeon_i2c_int_enable(i2c);
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+ i2c->int_enable(i2c);
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time_left = wait_event_timeout(i2c->queue, octeon_i2c_test_iflg(i2c),
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i2c->adap.timeout);
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- octeon_i2c_int_disable(i2c);
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+ i2c->int_disable(i2c);
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if (!time_left) {
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dev_dbg(i2c->dev, "%s: timeout\n", __func__);
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return -ETIMEDOUT;
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@@ -384,11 +455,11 @@ static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c)
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{
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int time_left;
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- octeon_i2c_hlc_int_enable(i2c);
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+ i2c->hlc_int_enable(i2c);
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time_left = wait_event_timeout(i2c->queue,
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octeon_i2c_hlc_test_ready(i2c),
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i2c->adap.timeout);
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- octeon_i2c_int_disable(i2c);
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+ i2c->hlc_int_disable(i2c);
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if (!time_left) {
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octeon_i2c_hlc_int_clear(i2c);
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return -ETIMEDOUT;
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@@ -946,14 +1017,26 @@ static struct i2c_adapter octeon_i2c_ops = {
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static int octeon_i2c_probe(struct platform_device *pdev)
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{
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struct device_node *node = pdev->dev.of_node;
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+ int irq, result = 0, hlc_irq = 0;
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struct resource *res_mem;
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struct octeon_i2c *i2c;
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- int irq, result = 0;
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+ bool cn78xx_style;
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+
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+ cn78xx_style = of_device_is_compatible(node, "cavium,octeon-7890-twsi");
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+ if (cn78xx_style) {
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+ hlc_irq = platform_get_irq(pdev, 0);
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+ if (hlc_irq < 0)
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+ return hlc_irq;
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- /* All adaptors have an irq. */
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- irq = platform_get_irq(pdev, 0);
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- if (irq < 0)
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- return irq;
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+ irq = platform_get_irq(pdev, 2);
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+ if (irq < 0)
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+ return irq;
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+ } else {
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+ /* All adaptors have an irq. */
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+ irq = platform_get_irq(pdev, 0);
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+ if (irq < 0)
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+ return irq;
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+ }
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i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
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if (!i2c) {
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@@ -988,6 +1071,31 @@ static int octeon_i2c_probe(struct platform_device *pdev)
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i2c->irq = irq;
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+ if (cn78xx_style) {
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+ i2c->hlc_irq = hlc_irq;
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+
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+ i2c->int_enable = octeon_i2c_int_enable78;
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+ i2c->int_disable = octeon_i2c_int_disable78;
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+ i2c->hlc_int_enable = octeon_i2c_hlc_int_enable78;
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+ i2c->hlc_int_disable = octeon_i2c_hlc_int_disable78;
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+
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+ irq_set_status_flags(i2c->irq, IRQ_NOAUTOEN);
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+ irq_set_status_flags(i2c->hlc_irq, IRQ_NOAUTOEN);
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+
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+ result = devm_request_irq(&pdev->dev, i2c->hlc_irq,
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+ octeon_i2c_hlc_isr78, 0,
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+ DRV_NAME, i2c);
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+ if (result < 0) {
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+ dev_err(i2c->dev, "failed to attach interrupt\n");
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+ goto out;
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+ }
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+ } else {
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+ i2c->int_enable = octeon_i2c_int_enable;
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+ i2c->int_disable = octeon_i2c_int_disable;
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+ i2c->hlc_int_enable = octeon_i2c_hlc_int_enable;
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+ i2c->hlc_int_disable = octeon_i2c_int_disable;
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+ }
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+
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result = devm_request_irq(&pdev->dev, i2c->irq,
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octeon_i2c_isr, 0, DRV_NAME, i2c);
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if (result < 0) {
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@@ -1034,6 +1142,7 @@ static int octeon_i2c_remove(struct platform_device *pdev)
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static const struct of_device_id octeon_i2c_match[] = {
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{ .compatible = "cavium,octeon-3860-twsi", },
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+ { .compatible = "cavium,octeon-7890-twsi", },
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{},
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};
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MODULE_DEVICE_TABLE(of, octeon_i2c_match);
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