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@@ -13,58 +13,94 @@
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extern struct task_struct *__switch_to(void *, void *);
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extern void update_cr_regs(struct task_struct *task);
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-static inline void save_fp_regs(s390_fp_regs *fpregs)
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+static inline int test_fp_ctl(u32 fpc)
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{
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+ u32 orig_fpc;
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+ int rc;
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+
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+ if (!MACHINE_HAS_IEEE)
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+ return 0;
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+
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asm volatile(
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- " std 0,%O0+8(%R0)\n"
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- " std 2,%O0+24(%R0)\n"
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- " std 4,%O0+40(%R0)\n"
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- " std 6,%O0+56(%R0)"
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- : "=Q" (*fpregs) : "Q" (*fpregs));
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+ " efpc %1\n"
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+ " sfpc %2\n"
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+ "0: sfpc %1\n"
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+ " la %0,0\n"
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+ "1:\n"
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+ EX_TABLE(0b,1b)
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+ : "=d" (rc), "=d" (orig_fpc)
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+ : "d" (fpc), "0" (-EINVAL));
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+ return rc;
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+}
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+
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+static inline void save_fp_ctl(u32 *fpc)
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+{
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if (!MACHINE_HAS_IEEE)
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return;
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+
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asm volatile(
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- " stfpc %0\n"
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- " std 1,%O0+16(%R0)\n"
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- " std 3,%O0+32(%R0)\n"
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- " std 5,%O0+48(%R0)\n"
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- " std 7,%O0+64(%R0)\n"
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- " std 8,%O0+72(%R0)\n"
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- " std 9,%O0+80(%R0)\n"
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- " std 10,%O0+88(%R0)\n"
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- " std 11,%O0+96(%R0)\n"
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- " std 12,%O0+104(%R0)\n"
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- " std 13,%O0+112(%R0)\n"
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- " std 14,%O0+120(%R0)\n"
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- " std 15,%O0+128(%R0)\n"
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- : "=Q" (*fpregs) : "Q" (*fpregs));
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+ " stfpc %0\n"
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+ : "+Q" (*fpc));
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}
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-static inline void restore_fp_regs(s390_fp_regs *fpregs)
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+static inline int restore_fp_ctl(u32 *fpc)
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{
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+ int rc;
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+
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+ if (!MACHINE_HAS_IEEE)
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+ return 0;
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+
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asm volatile(
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- " ld 0,%O0+8(%R0)\n"
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- " ld 2,%O0+24(%R0)\n"
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- " ld 4,%O0+40(%R0)\n"
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- " ld 6,%O0+56(%R0)"
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- : : "Q" (*fpregs));
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+ "0: lfpc %1\n"
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+ " la %0,0\n"
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+ "1:\n"
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+ EX_TABLE(0b,1b)
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+ : "=d" (rc) : "Q" (*fpc), "0" (-EINVAL));
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+ return rc;
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+}
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+
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+static inline void save_fp_regs(freg_t *fprs)
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+{
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+ asm volatile("std 0,%0" : "=Q" (fprs[0]));
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+ asm volatile("std 2,%0" : "=Q" (fprs[2]));
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+ asm volatile("std 4,%0" : "=Q" (fprs[4]));
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+ asm volatile("std 6,%0" : "=Q" (fprs[6]));
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if (!MACHINE_HAS_IEEE)
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return;
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- asm volatile(
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- " lfpc %0\n"
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- " ld 1,%O0+16(%R0)\n"
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- " ld 3,%O0+32(%R0)\n"
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- " ld 5,%O0+48(%R0)\n"
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- " ld 7,%O0+64(%R0)\n"
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- " ld 8,%O0+72(%R0)\n"
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- " ld 9,%O0+80(%R0)\n"
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- " ld 10,%O0+88(%R0)\n"
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- " ld 11,%O0+96(%R0)\n"
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- " ld 12,%O0+104(%R0)\n"
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- " ld 13,%O0+112(%R0)\n"
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- " ld 14,%O0+120(%R0)\n"
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- " ld 15,%O0+128(%R0)\n"
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- : : "Q" (*fpregs));
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+ asm volatile("std 1,%0" : "=Q" (fprs[1]));
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+ asm volatile("std 3,%0" : "=Q" (fprs[3]));
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+ asm volatile("std 5,%0" : "=Q" (fprs[5]));
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+ asm volatile("std 7,%0" : "=Q" (fprs[7]));
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+ asm volatile("std 8,%0" : "=Q" (fprs[8]));
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+ asm volatile("std 9,%0" : "=Q" (fprs[9]));
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+ asm volatile("std 10,%0" : "=Q" (fprs[10]));
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+ asm volatile("std 11,%0" : "=Q" (fprs[11]));
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+ asm volatile("std 12,%0" : "=Q" (fprs[12]));
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+ asm volatile("std 13,%0" : "=Q" (fprs[13]));
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+ asm volatile("std 14,%0" : "=Q" (fprs[14]));
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+ asm volatile("std 15,%0" : "=Q" (fprs[15]));
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+}
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+
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+static inline void restore_fp_regs(freg_t *fprs)
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+{
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+ asm volatile("ld 0,%0" : : "Q" (fprs[0]));
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+ asm volatile("ld 2,%0" : : "Q" (fprs[2]));
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+ asm volatile("ld 4,%0" : : "Q" (fprs[4]));
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+ asm volatile("ld 6,%0" : : "Q" (fprs[6]));
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+ if (!MACHINE_HAS_IEEE)
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+ return;
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+ asm volatile("ld 1,%0" : : "Q" (fprs[1]));
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+ asm volatile("ld 3,%0" : : "Q" (fprs[3]));
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+ asm volatile("ld 5,%0" : : "Q" (fprs[5]));
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+ asm volatile("ld 7,%0" : : "Q" (fprs[7]));
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+ asm volatile("ld 8,%0" : : "Q" (fprs[8]));
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+ asm volatile("ld 9,%0" : : "Q" (fprs[9]));
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+ asm volatile("ld 10,%0" : : "Q" (fprs[10]));
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+ asm volatile("ld 11,%0" : : "Q" (fprs[11]));
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+ asm volatile("ld 12,%0" : : "Q" (fprs[12]));
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+ asm volatile("ld 13,%0" : : "Q" (fprs[13]));
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+ asm volatile("ld 14,%0" : : "Q" (fprs[14]));
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+ asm volatile("ld 15,%0" : : "Q" (fprs[15]));
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}
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static inline void save_access_regs(unsigned int *acrs)
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@@ -83,12 +119,14 @@ static inline void restore_access_regs(unsigned int *acrs)
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#define switch_to(prev,next,last) do { \
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if (prev->mm) { \
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- save_fp_regs(&prev->thread.fp_regs); \
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+ save_fp_ctl(&prev->thread.fp_regs.fpc); \
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+ save_fp_regs(prev->thread.fp_regs.fprs); \
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save_access_regs(&prev->thread.acrs[0]); \
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save_ri_cb(prev->thread.ri_cb); \
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} \
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if (next->mm) { \
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- restore_fp_regs(&next->thread.fp_regs); \
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+ restore_fp_ctl(&next->thread.fp_regs.fpc); \
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+ restore_fp_regs(next->thread.fp_regs.fprs); \
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restore_access_regs(&next->thread.acrs[0]); \
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restore_ri_cb(next->thread.ri_cb, prev->thread.ri_cb); \
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update_cr_regs(next); \
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