Add clock ids for the upctl and publ controllers used for ddr control. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
@@ -108,6 +108,8 @@
#define PCLK_TSADC 349
#define PCLK_CPU 350
#define PCLK_PERI 351
+#define PCLK_DDRUPCTL 352
+#define PCLK_PUBL 353
/* hclk gates */
#define HCLK_SDMMC 448