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@@ -74,6 +74,8 @@ enum sh_cmt_model {
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struct sh_cmt_info {
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enum sh_cmt_model model;
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+ unsigned int channels_mask;
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+
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unsigned long width; /* 16 or 32 bit version of hardware block */
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unsigned long overflow_bit;
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unsigned long clear_bits;
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@@ -212,6 +214,7 @@ static const struct sh_cmt_info sh_cmt_info[] = {
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},
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[SH_CMT_48BIT] = {
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.model = SH_CMT_48BIT,
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+ .channels_mask = 0x3f,
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.width = 32,
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.overflow_bit = SH_CMT32_CMCSR_CMF,
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.clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
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@@ -966,9 +969,14 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
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id = of_match_node(sh_cmt_of_table, pdev->dev.of_node);
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cmt->info = id->data;
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- ret = sh_cmt_parse_dt(cmt);
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- if (ret < 0)
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- return ret;
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+ /* prefer in-driver channel configuration over DT */
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+ if (cmt->info->channels_mask) {
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+ cmt->hw_channels = cmt->info->channels_mask;
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+ } else {
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+ ret = sh_cmt_parse_dt(cmt);
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+ if (ret < 0)
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+ return ret;
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+ }
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} else if (pdev->dev.platform_data) {
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struct sh_timer_config *cfg = pdev->dev.platform_data;
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const struct platform_device_id *id = pdev->id_entry;
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