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@@ -42,6 +42,9 @@
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#define DMA_STAT 0x30
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+/* Offset between DMA_IRQ_EN and DMA_IRQ_STAT limits number of channels */
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+#define DMA_MAX_CHANNELS (DMA_IRQ_CHAN_NR * 0x10 / 4)
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+
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/*
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* sun8i specific registers
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*/
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@@ -65,7 +68,8 @@
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#define DMA_CHAN_LLI_ADDR 0x08
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#define DMA_CHAN_CUR_CFG 0x0c
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-#define DMA_CHAN_CFG_SRC_DRQ(x) ((x) & 0x1f)
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+#define DMA_CHAN_MAX_DRQ 0x1f
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+#define DMA_CHAN_CFG_SRC_DRQ(x) ((x) & DMA_CHAN_MAX_DRQ)
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#define DMA_CHAN_CFG_SRC_IO_MODE BIT(5)
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#define DMA_CHAN_CFG_SRC_LINEAR_MODE (0 << 5)
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#define DMA_CHAN_CFG_SRC_BURST_A31(x) (((x) & 0x3) << 7)
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@@ -1174,6 +1178,7 @@ MODULE_DEVICE_TABLE(of, sun6i_dma_match);
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static int sun6i_dma_probe(struct platform_device *pdev)
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{
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+ struct device_node *np = pdev->dev.of_node;
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struct sun6i_dma_dev *sdc;
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struct resource *res;
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int ret, i;
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@@ -1248,6 +1253,26 @@ static int sun6i_dma_probe(struct platform_device *pdev)
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sdc->num_vchans = sdc->cfg->nr_max_vchans;
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sdc->max_request = sdc->cfg->nr_max_requests;
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+ ret = of_property_read_u32(np, "dma-channels", &sdc->num_pchans);
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+ if (ret && !sdc->num_pchans) {
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+ dev_err(&pdev->dev, "Can't get dma-channels.\n");
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+ return ret;
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+ }
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+
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+ ret = of_property_read_u32(np, "dma-requests", &sdc->max_request);
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+ if (ret && !sdc->max_request) {
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+ dev_info(&pdev->dev, "Missing dma-requests, using %u.\n",
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+ DMA_CHAN_MAX_DRQ);
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+ sdc->max_request = DMA_CHAN_MAX_DRQ;
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+ }
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+
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+ /*
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+ * If the number of vchans is not specified, derive it from the
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+ * highest port number, at most one channel per port and direction.
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+ */
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+ if (!sdc->num_vchans)
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+ sdc->num_vchans = 2 * (sdc->max_request + 1);
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+
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sdc->pchans = devm_kcalloc(&pdev->dev, sdc->num_pchans,
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sizeof(struct sun6i_pchan), GFP_KERNEL);
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if (!sdc->pchans)
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