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@@ -182,6 +182,24 @@ static unsigned int dw8250_serial_in32(struct uart_port *p, int offset)
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return dw8250_modify_msr(p, offset, value);
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}
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+static void dw8250_serial_out32be(struct uart_port *p, int offset, int value)
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+{
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+ struct dw8250_data *d = p->private_data;
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+
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+ iowrite32be(value, p->membase + (offset << p->regshift));
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+
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+ if (offset == UART_LCR && !d->uart_16550_compatible)
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+ dw8250_check_lcr(p, value);
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+}
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+
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+static unsigned int dw8250_serial_in32be(struct uart_port *p, int offset)
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+{
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+ unsigned int value = ioread32be(p->membase + (offset << p->regshift));
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+
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+ return dw8250_modify_msr(p, offset, value);
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+}
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+
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+
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static int dw8250_handle_irq(struct uart_port *p)
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{
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struct dw8250_data *d = p->private_data;
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@@ -276,6 +294,11 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)
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data->skip_autocfg = true;
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}
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#endif
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+ if (of_device_is_big_endian(p->dev->of_node)) {
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+ p->iotype = UPIO_MEM32BE;
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+ p->serial_in = dw8250_serial_in32be;
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+ p->serial_out = dw8250_serial_out32be;
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+ }
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} else if (has_acpi_companion(p->dev)) {
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p->iotype = UPIO_MEM32;
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p->regshift = 2;
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