|
@@ -636,8 +636,8 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
|
|
|
|
|
|
/* Check the final link width from negotiated lane counter from MGMT */
|
|
|
status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL);
|
|
|
- status = 0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >>
|
|
|
- PCIE_CORE_PL_CONF_LANE_MASK);
|
|
|
+ status = 0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >>
|
|
|
+ PCIE_CORE_PL_CONF_LANE_SHIFT);
|
|
|
dev_dbg(dev, "current link width is x%d\n", status);
|
|
|
|
|
|
rockchip_pcie_write(rockchip, ROCKCHIP_VENDOR_ID,
|