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@@ -2157,24 +2157,24 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder)
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}
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static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
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- int link_rate, uint32_t lane_count,
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- struct intel_shared_dpll *pll,
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- bool link_mst)
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+ const struct intel_crtc_state *crtc_state,
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+ const struct drm_connector_state *conn_state)
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{
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struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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enum port port = intel_ddi_get_encoder_port(encoder);
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struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
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+ bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
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uint32_t level = intel_ddi_dp_level(intel_dp);
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- WARN_ON(link_mst && (port == PORT_A || port == PORT_E));
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+ WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
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- intel_dp_set_link_params(intel_dp, link_rate, lane_count,
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- link_mst);
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+ intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
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+ crtc_state->lane_count, is_mst);
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intel_edp_panel_on(intel_dp);
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- intel_ddi_clk_select(encoder, pll);
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+ intel_ddi_clk_select(encoder, crtc_state->shared_dpll);
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intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain);
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@@ -2186,7 +2186,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
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intel_prepare_dp_ddi_buffers(encoder);
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intel_ddi_init_dp_buf_reg(encoder);
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- if (!link_mst)
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+ if (!is_mst)
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intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
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intel_dp_start_link_train(intel_dp);
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if (port != PORT_A || INTEL_GEN(dev_priv) >= 9)
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@@ -2194,10 +2194,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
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}
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static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
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- bool has_infoframe,
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const struct intel_crtc_state *crtc_state,
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- const struct drm_connector_state *conn_state,
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- const struct intel_shared_dpll *pll)
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+ const struct drm_connector_state *conn_state)
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{
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struct intel_digital_port *intel_dig_port = enc_to_dig_port(&encoder->base);
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struct intel_hdmi *intel_hdmi = &intel_dig_port->hdmi;
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@@ -2207,7 +2205,7 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
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struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
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intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);
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- intel_ddi_clk_select(encoder, pll);
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+ intel_ddi_clk_select(encoder, crtc_state->shared_dpll);
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intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain);
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@@ -2223,38 +2221,26 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
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skl_ddi_set_iboost(encoder, level);
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intel_dig_port->set_infoframes(&encoder->base,
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- has_infoframe,
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+ crtc_state->has_infoframe,
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crtc_state, conn_state);
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}
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static void intel_ddi_pre_enable(struct intel_encoder *encoder,
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- const struct intel_crtc_state *pipe_config,
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+ const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state)
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{
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- struct drm_crtc *crtc = pipe_config->base.crtc;
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- struct drm_i915_private *dev_priv = to_i915(crtc->dev);
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- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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- int pipe = intel_crtc->pipe;
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- int type = encoder->type;
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+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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+ enum pipe pipe = crtc->pipe;
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- WARN_ON(intel_crtc->config->has_pch_encoder);
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+ WARN_ON(crtc_state->has_pch_encoder);
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intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
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- if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {
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- intel_ddi_pre_enable_dp(encoder,
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- pipe_config->port_clock,
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- pipe_config->lane_count,
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- pipe_config->shared_dpll,
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- intel_crtc_has_type(pipe_config,
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- INTEL_OUTPUT_DP_MST));
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- }
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- if (type == INTEL_OUTPUT_HDMI) {
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- intel_ddi_pre_enable_hdmi(encoder,
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- pipe_config->has_infoframe,
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- pipe_config, conn_state,
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- pipe_config->shared_dpll);
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- }
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+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
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+ intel_ddi_pre_enable_hdmi(encoder, crtc_state, conn_state);
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+ else
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+ intel_ddi_pre_enable_dp(encoder, crtc_state, conn_state);
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}
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static void intel_disable_ddi_buf(struct intel_encoder *encoder)
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