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@@ -1098,23 +1098,10 @@ static void imx_disable_dma(struct imx_port *sport)
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/* half the RX buffer size */
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#define CTSTL 16
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-static inline void imx_reset(struct imx_port *sport)
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-{
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- int i = 100;
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- unsigned long temp;
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-
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- temp = readl(sport->port.membase + UCR2);
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- temp &= ~UCR2_SRST;
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- writel(temp, sport->port.membase + UCR2);
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-
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- while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0))
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- udelay(1);
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-}
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-
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static int imx_startup(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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- int retval;
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+ int retval, i;
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unsigned long flags, temp;
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retval = clk_prepare_enable(sport->clk_per);
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@@ -1141,7 +1128,14 @@ static int imx_startup(struct uart_port *port)
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spin_lock_irqsave(&sport->port.lock, flags);
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/* Reset fifo's and state machines */
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- imx_reset(sport);
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+ i = 100;
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+
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+ temp = readl(sport->port.membase + UCR2);
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+ temp &= ~UCR2_SRST;
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+ writel(temp, sport->port.membase + UCR2);
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+
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+ while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0))
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+ udelay(1);
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/*
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* Finally, clear and enable interrupts
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@@ -1980,14 +1974,6 @@ static int serial_imx_probe(struct platform_device *pdev)
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clk_disable_unprepare(sport->clk_ipg);
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- /*
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- * Perform a complete reset of the UART device. Needed if we don't
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- * come straight out of reset.
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- */
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- writel(0, sport->port.membase + UCR2);
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- writel(0, sport->port.membase + UCR1);
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- imx_reset(sport);
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-
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/*
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* Allocate the IRQ(s) i.MX1 has three interrupts whereas later
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* chips only have one interrupt.
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