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@@ -576,13 +576,58 @@ static size_t fsl_espi_max_message_size(struct spi_device *spi)
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return SPCOM_TRANLEN_MAX;
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return SPCOM_TRANLEN_MAX;
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}
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}
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+static void fsl_espi_init_regs(struct device *dev, bool initial)
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+{
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+ struct spi_master *master = dev_get_drvdata(dev);
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+ struct mpc8xxx_spi *mspi = spi_master_get_devdata(master);
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+ struct device_node *nc;
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+ u32 csmode, cs, prop;
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+ int ret;
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+
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+ /* SPI controller initializations */
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+ fsl_espi_write_reg(mspi, ESPI_SPMODE, 0);
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+ fsl_espi_write_reg(mspi, ESPI_SPIM, 0);
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+ fsl_espi_write_reg(mspi, ESPI_SPCOM, 0);
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+ fsl_espi_write_reg(mspi, ESPI_SPIE, 0xffffffff);
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+
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+ /* Init eSPI CS mode register */
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+ for_each_available_child_of_node(master->dev.of_node, nc) {
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+ /* get chip select */
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+ ret = of_property_read_u32(nc, "reg", &cs);
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+ if (ret || cs >= master->num_chipselect)
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+ continue;
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+
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+ csmode = CSMODE_INIT_VAL;
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+
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+ /* check if CSBEF is set in device tree */
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+ ret = of_property_read_u32(nc, "fsl,csbef", &prop);
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+ if (!ret) {
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+ csmode &= ~(CSMODE_BEF(0xf));
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+ csmode |= CSMODE_BEF(prop);
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+ }
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+
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+ /* check if CSAFT is set in device tree */
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+ ret = of_property_read_u32(nc, "fsl,csaft", &prop);
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+ if (!ret) {
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+ csmode &= ~(CSMODE_AFT(0xf));
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+ csmode |= CSMODE_AFT(prop);
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+ }
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+
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+ fsl_espi_write_reg(mspi, ESPI_SPMODEx(cs), csmode);
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+
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+ if (initial)
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+ dev_info(dev, "cs=%u, init_csmode=0x%x\n", cs, csmode);
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+ }
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+
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+ /* Enable SPI interface */
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+ fsl_espi_write_reg(mspi, ESPI_SPMODE, SPMODE_INIT_VAL | SPMODE_ENABLE);
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+}
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+
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static int fsl_espi_probe(struct device *dev, struct resource *mem,
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static int fsl_espi_probe(struct device *dev, struct resource *mem,
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unsigned int irq, unsigned int num_cs)
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unsigned int irq, unsigned int num_cs)
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{
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{
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struct spi_master *master;
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struct spi_master *master;
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struct mpc8xxx_spi *mpc8xxx_spi;
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struct mpc8xxx_spi *mpc8xxx_spi;
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- struct device_node *nc;
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- u32 regval, csmode, cs, prop;
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int ret;
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int ret;
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master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));
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master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));
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@@ -634,44 +679,7 @@ static int fsl_espi_probe(struct device *dev, struct resource *mem,
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if (ret)
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if (ret)
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goto err_probe;
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goto err_probe;
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- /* SPI controller initializations */
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, 0);
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIM, 0);
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPCOM, 0);
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIE, 0xffffffff);
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-
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- /* Init eSPI CS mode register */
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- for_each_available_child_of_node(master->dev.of_node, nc) {
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- /* get chip select */
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- ret = of_property_read_u32(nc, "reg", &cs);
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- if (ret || cs >= num_cs)
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- continue;
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-
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- csmode = CSMODE_INIT_VAL;
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-
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- /* check if CSBEF is set in device tree */
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- ret = of_property_read_u32(nc, "fsl,csbef", &prop);
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- if (!ret) {
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- csmode &= ~(CSMODE_BEF(0xf));
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- csmode |= CSMODE_BEF(prop);
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- }
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-
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- /* check if CSAFT is set in device tree */
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- ret = of_property_read_u32(nc, "fsl,csaft", &prop);
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- if (!ret) {
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- csmode &= ~(CSMODE_AFT(0xf));
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- csmode |= CSMODE_AFT(prop);
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- }
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-
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODEx(cs), csmode);
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-
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- dev_info(dev, "cs=%u, init_csmode=0x%x\n", cs, csmode);
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- }
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-
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- /* Enable SPI interface */
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- regval = SPMODE_INIT_VAL | SPMODE_ENABLE;
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-
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, regval);
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+ fsl_espi_init_regs(dev, true);
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pm_runtime_set_autosuspend_delay(dev, AUTOSUSPEND_TIMEOUT);
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pm_runtime_set_autosuspend_delay(dev, AUTOSUSPEND_TIMEOUT);
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pm_runtime_use_autosuspend(dev);
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pm_runtime_use_autosuspend(dev);
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@@ -771,27 +779,9 @@ static int of_fsl_espi_suspend(struct device *dev)
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static int of_fsl_espi_resume(struct device *dev)
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static int of_fsl_espi_resume(struct device *dev)
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{
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{
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struct spi_master *master = dev_get_drvdata(dev);
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struct spi_master *master = dev_get_drvdata(dev);
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- struct mpc8xxx_spi *mpc8xxx_spi;
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- u32 regval;
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- int i, ret;
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-
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- mpc8xxx_spi = spi_master_get_devdata(master);
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-
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- /* SPI controller initializations */
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, 0);
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIM, 0);
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPCOM, 0);
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIE, 0xffffffff);
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-
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- /* Init eSPI CS mode register */
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- for (i = 0; i < master->num_chipselect; i++)
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODEx(i),
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- CSMODE_INIT_VAL);
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-
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- /* Enable SPI interface */
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- regval = SPMODE_INIT_VAL | SPMODE_ENABLE;
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+ int ret;
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- fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, regval);
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+ fsl_espi_init_regs(dev, false);
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ret = pm_runtime_force_resume(dev);
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ret = pm_runtime_force_resume(dev);
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if (ret < 0)
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if (ret < 0)
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