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@@ -106,16 +106,14 @@ struct rockchip_thermal_data {
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#define TSADCV2_AUTO_PERIOD_HT 0x6c
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#define TSADCV2_AUTO_EN BIT(0)
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-#define TSADCV2_AUTO_DISABLE ~BIT(0)
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#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
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-#define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
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#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
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#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
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-#define TSADCV2_INT_PD_CLEAR ~BIT(8)
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+#define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
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#define TSADCV2_DATA_MASK 0xfff
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#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
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@@ -244,10 +242,10 @@ static void rk_tsadcv2_initialize(void __iomem *regs,
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enum tshut_polarity tshut_polarity)
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{
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if (tshut_polarity == TSHUT_HIGH_ACTIVE)
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- writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
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+ writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
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regs + TSADCV2_AUTO_CON);
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else
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- writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_LOW),
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+ writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
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regs + TSADCV2_AUTO_CON);
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writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
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@@ -264,7 +262,7 @@ static void rk_tsadcv2_irq_ack(void __iomem *regs)
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u32 val;
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val = readl_relaxed(regs + TSADCV2_INT_PD);
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- writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
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+ writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
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}
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static void rk_tsadcv2_control(void __iomem *regs, bool enable)
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