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@@ -10,8 +10,14 @@ Required properties :
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- compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
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For Tegra132, must contain "nvidia,tegra132-soctherm".
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For Tegra210, must contain "nvidia,tegra210-soctherm".
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-- reg : Should contain 1 entry:
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+- reg : Should contain at least 2 entries for each entry in reg-names:
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- SOCTHERM register set
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+ - Tegra CAR register set: Required for Tegra124 and Tegra210.
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+ - CCROC register set: Required for Tegra132.
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+- reg-names : Should contain at least 2 entries:
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+ - soctherm-reg
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+ - car-reg
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+ - ccroc-reg
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- interrupts : Defines the interrupt used by SOCTHERM
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- clocks : Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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@@ -25,17 +31,45 @@ Required properties :
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- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
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of this property. See <dt-bindings/thermal/tegra124-soctherm.h> for a
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list of valid values when referring to thermal sensors.
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+- throttle-cfgs: A sub-node which is a container of configuration for each
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+ hardware throttle events. These events can be set as cooling devices.
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+ * throttle events: Sub-nodes must be named as "light" or "heavy".
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+ Properties:
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+ - nvidia,priority: Each throttles has its own throttle settings, so the
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+ SW need to set priorities for various throttle, the HW arbiter can select
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+ the final throttle settings.
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+ Bigger value indicates higher priority, In general, higher priority
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+ translates to lower target frequency. SW needs to ensure that critical
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+ thermal alarms are given higher priority, and ensure that there is
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+ no race if priority of two vectors is set to the same value.
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+ The range of this value is 1~100.
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+ - nvidia,cpu-throt-percent: This property is for Tegra124 and Tegra210.
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+ It is the throttling depth of pulse skippers, it's the percentage
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+ throttling.
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+ - nvidia,cpu-throt-level: This property is only for Tegra132, it is the
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+ level of pulse skippers, which used to throttle clock frequencies. It
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+ indicates cpu clock throttling depth, and the depth can be programmed.
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+ Must set as following values:
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+ TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED
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+ TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE
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+ - #cooling-cells: Should be 1. This cooling device only support on/off state.
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+ See ./thermal.txt for a description of this property.
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Note:
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- the "critical" type trip points will be set to SOC_THERM hardware as the
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shut down temperature. Once the temperature of this thermal zone is higher
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than it, the system will be shutdown or reset by hardware.
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+- the "hot" type trip points will be set to SOC_THERM hardware as the throttle
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+temperature. Once the the temperature of this thermal zone is higher
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+than it, it will trigger the HW throttle event.
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Example :
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soctherm@700e2000 {
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compatible = "nvidia,tegra124-soctherm";
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- reg = <0x0 0x700e2000 0x0 0x1000>;
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+ reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
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+ 0x0 0x60006000 0x0 0x400 /* CAR reg_base */
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+ reg-names = "soctherm-reg", "car-reg";
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
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<&tegra_car TEGRA124_CLK_SOC_THERM>;
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@@ -44,6 +78,76 @@ Example :
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reset-names = "soctherm";
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#thermal-sensor-cells = <1>;
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+
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+ throttle-cfgs {
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+ /*
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+ * When the "heavy" cooling device triggered,
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+ * the HW will skip cpu clock's pulse in 85% depth
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+ */
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+ throttle_heavy: heavy {
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+ nvidia,priority = <100>;
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+ nvidia,cpu-throt-percent = <85>;
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+
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+ #cooling-cells = <1>;
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+ };
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+
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+ /*
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+ * When the "light" cooling device triggered,
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+ * the HW will skip cpu clock's pulse in 50% depth
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+ */
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+ throttle_light: light {
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+ nvidia,priority = <80>;
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+ nvidia,cpu-throt-percent = <50>;
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+
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+ #cooling-cells = <1>;
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+ };
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+
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+ /*
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+ * If these two devices are triggered in same time, the HW throttle
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+ * arbiter will select the highest priority as the final throttle
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+ * settings to skip cpu pulse.
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+ */
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+ };
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+ };
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+
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+Example: referring to Tegra132's "reg", "reg-names" and "throttle-cfgs" :
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+
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+ soctherm@700e2000 {
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+ compatible = "nvidia,tegra132-soctherm";
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+ reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
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+ 0x0 0x70040000 0x0 0x200>; /* CCROC reg_base */;
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+ reg-names = "soctherm-reg", "ccroc-reg";
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+
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+ throttle-cfgs {
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+ /*
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+ * When the "heavy" cooling device triggered,
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+ * the HW will skip cpu clock's pulse in HIGH level
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+ */
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+ throttle_heavy: heavy {
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+ nvidia,priority = <100>;
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+ nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
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+
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+ #cooling-cells = <1>;
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+ };
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+
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+ /*
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+ * When the "light" cooling device triggered,
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+ * the HW will skip cpu clock's pulse in MED level
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+ */
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+ throttle_light: light {
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+ nvidia,priority = <80>;
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+ nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>;
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+
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+ #cooling-cells = <1>;
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+ };
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+
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+ /*
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+ * If these two devices are triggered in same time, the HW throttle
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+ * arbiter will select the highest priority as the final throttle
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+ * settings to skip cpu pulse.
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+ */
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+
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+ };
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};
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Example: referring to thermal sensors :
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@@ -62,6 +166,19 @@ Example: referring to thermal sensors :
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hysteresis = <1000>;
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type = "critical";
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};
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+
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+ cpu_throttle_trip: throttle-trip {
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+ temperature = <100000>;
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+ hysteresis = <1000>;
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+ type = "hot";
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+ };
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+ };
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+
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+ cooling-maps {
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+ map0 {
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+ trip = <&cpu_throttle_trip>;
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+ cooling-device = <&throttle_heavy 1 1>;
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+ };
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};
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};
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};
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