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@@ -381,7 +381,7 @@ static void imx_port_ucrs_restore(struct imx_port *sport,
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}
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#endif
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-static void imx_port_rts_active(struct imx_port *sport, unsigned long *ucr2)
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+static void imx_port_rts_active(struct imx_port *sport, u32 *ucr2)
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{
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*ucr2 &= ~(UCR2_CTSC | UCR2_CTS);
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@@ -389,7 +389,7 @@ static void imx_port_rts_active(struct imx_port *sport, unsigned long *ucr2)
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mctrl_gpio_set(sport->gpios, sport->port.mctrl);
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}
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-static void imx_port_rts_inactive(struct imx_port *sport, unsigned long *ucr2)
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+static void imx_port_rts_inactive(struct imx_port *sport, u32 *ucr2)
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{
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*ucr2 &= ~UCR2_CTSC;
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*ucr2 |= UCR2_CTS;
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@@ -398,7 +398,7 @@ static void imx_port_rts_inactive(struct imx_port *sport, unsigned long *ucr2)
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mctrl_gpio_set(sport->gpios, sport->port.mctrl);
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}
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-static void imx_port_rts_auto(struct imx_port *sport, unsigned long *ucr2)
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+static void imx_port_rts_auto(struct imx_port *sport, u32 *ucr2)
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{
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*ucr2 |= UCR2_CTSC;
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}
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@@ -407,7 +407,7 @@ static void imx_port_rts_auto(struct imx_port *sport, unsigned long *ucr2)
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static void imx_stop_tx(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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- unsigned long temp;
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+ u32 ucr1;
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/*
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* We are maybe in the SMP context, so if the DMA TX thread is running
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@@ -416,23 +416,23 @@ static void imx_stop_tx(struct uart_port *port)
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if (sport->dma_is_txing)
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return;
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- temp = imx_uart_readl(sport, UCR1);
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- imx_uart_writel(sport, temp & ~UCR1_TXMPTYEN, UCR1);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ imx_uart_writel(sport, ucr1 & ~UCR1_TXMPTYEN, UCR1);
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/* in rs485 mode disable transmitter if shifter is empty */
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if (port->rs485.flags & SER_RS485_ENABLED &&
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imx_uart_readl(sport, USR2) & USR2_TXDC) {
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- temp = imx_uart_readl(sport, UCR2);
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+ u32 ucr2 = imx_uart_readl(sport, UCR2), ucr4;
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if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
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- imx_port_rts_active(sport, &temp);
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+ imx_port_rts_active(sport, &ucr2);
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else
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- imx_port_rts_inactive(sport, &temp);
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- temp |= UCR2_RXEN;
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- imx_uart_writel(sport, temp, UCR2);
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+ imx_port_rts_inactive(sport, &ucr2);
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+ ucr2 |= UCR2_RXEN;
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+ imx_uart_writel(sport, ucr2, UCR2);
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- temp = imx_uart_readl(sport, UCR4);
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- temp &= ~UCR4_TCEN;
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- imx_uart_writel(sport, temp, UCR4);
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+ ucr4 = imx_uart_readl(sport, UCR4);
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+ ucr4 &= ~UCR4_TCEN;
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+ imx_uart_writel(sport, ucr4, UCR4);
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}
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}
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@@ -440,7 +440,7 @@ static void imx_stop_tx(struct uart_port *port)
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static void imx_stop_rx(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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- unsigned long temp;
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+ u32 ucr1, ucr2;
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if (sport->dma_is_rxing) {
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if (sport->port.suspended) {
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@@ -451,12 +451,12 @@ static void imx_stop_rx(struct uart_port *port)
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}
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}
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- temp = imx_uart_readl(sport, UCR2);
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- imx_uart_writel(sport, temp & ~UCR2_RXEN, UCR2);
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+ ucr2 = imx_uart_readl(sport, UCR2);
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+ imx_uart_writel(sport, ucr2 & ~UCR2_RXEN, UCR2);
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/* disable the `Receiver Ready Interrrupt` */
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- temp = imx_uart_readl(sport, UCR1);
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- imx_uart_writel(sport, temp & ~UCR1_RRDYEN, UCR1);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ imx_uart_writel(sport, ucr1 & ~UCR1_RRDYEN, UCR1);
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}
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/* called with port.lock taken and irqs off */
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@@ -475,7 +475,6 @@ static void imx_dma_tx(struct imx_port *sport);
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static inline void imx_transmit_buffer(struct imx_port *sport)
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{
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struct circ_buf *xmit = &sport->port.state->xmit;
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- unsigned long temp;
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if (sport->port.x_char) {
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/* Send next char */
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@@ -491,17 +490,18 @@ static inline void imx_transmit_buffer(struct imx_port *sport)
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}
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if (sport->dma_is_enabled) {
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+ u32 ucr1;
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/*
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* We've just sent a X-char Ensure the TX DMA is enabled
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* and the TX IRQ is disabled.
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**/
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- temp = imx_uart_readl(sport, UCR1);
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- temp &= ~UCR1_TXMPTYEN;
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ ucr1 &= ~UCR1_TXMPTYEN;
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if (sport->dma_is_txing) {
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- temp |= UCR1_TXDMAEN;
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- imx_uart_writel(sport, temp, UCR1);
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+ ucr1 |= UCR1_TXDMAEN;
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+ imx_uart_writel(sport, ucr1, UCR1);
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} else {
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- imx_uart_writel(sport, temp, UCR1);
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+ imx_uart_writel(sport, ucr1, UCR1);
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imx_dma_tx(sport);
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}
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@@ -530,15 +530,15 @@ static void dma_tx_callback(void *data)
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struct scatterlist *sgl = &sport->tx_sgl[0];
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struct circ_buf *xmit = &sport->port.state->xmit;
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unsigned long flags;
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- unsigned long temp;
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+ u32 ucr1;
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spin_lock_irqsave(&sport->port.lock, flags);
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dma_unmap_sg(sport->port.dev, sgl, sport->dma_tx_nents, DMA_TO_DEVICE);
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- temp = imx_uart_readl(sport, UCR1);
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- temp &= ~UCR1_TXDMAEN;
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- imx_uart_writel(sport, temp, UCR1);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ ucr1 &= ~UCR1_TXDMAEN;
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+ imx_uart_writel(sport, ucr1, UCR1);
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/* update the stat */
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xmit->tail = (xmit->tail + sport->tx_bytes) & (UART_XMIT_SIZE - 1);
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@@ -565,7 +565,7 @@ static void imx_dma_tx(struct imx_port *sport)
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struct dma_async_tx_descriptor *desc;
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struct dma_chan *chan = sport->dma_chan_tx;
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struct device *dev = sport->port.dev;
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- unsigned long temp;
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+ u32 ucr1;
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int ret;
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if (sport->dma_is_txing)
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@@ -603,9 +603,9 @@ static void imx_dma_tx(struct imx_port *sport)
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dev_dbg(dev, "TX: prepare to send %lu bytes by DMA.\n",
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uart_circ_chars_pending(xmit));
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- temp = imx_uart_readl(sport, UCR1);
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- temp |= UCR1_TXDMAEN;
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- imx_uart_writel(sport, temp, UCR1);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ ucr1 |= UCR1_TXDMAEN;
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+ imx_uart_writel(sport, ucr1, UCR1);
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/* fire it */
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sport->dma_is_txing = 1;
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@@ -618,37 +618,39 @@ static void imx_dma_tx(struct imx_port *sport)
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static void imx_start_tx(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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- unsigned long temp;
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+ u32 ucr1;
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if (port->rs485.flags & SER_RS485_ENABLED) {
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- temp = imx_uart_readl(sport, UCR2);
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+ u32 ucr2, ucr4;
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+
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+ ucr2 = imx_uart_readl(sport, UCR2);
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if (port->rs485.flags & SER_RS485_RTS_ON_SEND)
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- imx_port_rts_active(sport, &temp);
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+ imx_port_rts_active(sport, &ucr2);
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else
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- imx_port_rts_inactive(sport, &temp);
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+ imx_port_rts_inactive(sport, &ucr2);
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if (!(port->rs485.flags & SER_RS485_RX_DURING_TX))
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- temp &= ~UCR2_RXEN;
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- imx_uart_writel(sport, temp, UCR2);
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+ ucr2 &= ~UCR2_RXEN;
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+ imx_uart_writel(sport, ucr2, UCR2);
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/* enable transmitter and shifter empty irq */
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- temp = imx_uart_readl(sport, UCR4);
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- temp |= UCR4_TCEN;
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- imx_uart_writel(sport, temp, UCR4);
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+ ucr4 = imx_uart_readl(sport, UCR4);
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+ ucr4 |= UCR4_TCEN;
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+ imx_uart_writel(sport, ucr4, UCR4);
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}
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if (!sport->dma_is_enabled) {
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- temp = imx_uart_readl(sport, UCR1);
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- imx_uart_writel(sport, temp | UCR1_TXMPTYEN, UCR1);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ imx_uart_writel(sport, ucr1 | UCR1_TXMPTYEN, UCR1);
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}
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if (sport->dma_is_enabled) {
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if (sport->port.x_char) {
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/* We have X-char to send, so enable TX IRQ and
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* disable TX DMA to let TX interrupt to send X-char */
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- temp = imx_uart_readl(sport, UCR1);
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- temp &= ~UCR1_TXDMAEN;
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- temp |= UCR1_TXMPTYEN;
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- imx_uart_writel(sport, temp, UCR1);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ ucr1 &= ~UCR1_TXDMAEN;
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+ ucr1 |= UCR1_TXMPTYEN;
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+ imx_uart_writel(sport, ucr1, UCR1);
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return;
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}
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@@ -662,14 +664,14 @@ static void imx_start_tx(struct uart_port *port)
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static irqreturn_t imx_rtsint(int irq, void *dev_id)
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{
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struct imx_port *sport = dev_id;
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- unsigned int val;
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+ u32 usr1;
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unsigned long flags;
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spin_lock_irqsave(&sport->port.lock, flags);
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imx_uart_writel(sport, USR1_RTSD, USR1);
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- val = imx_uart_readl(sport, USR1) & USR1_RTSS;
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- uart_handle_cts_change(&sport->port, !!val);
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+ usr1 = imx_uart_readl(sport, USR1) & USR1_RTSS;
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+ uart_handle_cts_change(&sport->port, !!usr1);
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wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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@@ -692,18 +694,20 @@ static irqreturn_t imx_rxint(int irq, void *dev_id)
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struct imx_port *sport = dev_id;
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unsigned int rx, flg, ignored = 0;
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struct tty_port *port = &sport->port.state->port;
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- unsigned long flags, temp;
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+ unsigned long flags;
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spin_lock_irqsave(&sport->port.lock, flags);
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while (imx_uart_readl(sport, USR2) & USR2_RDR) {
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+ u32 usr2;
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+
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flg = TTY_NORMAL;
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sport->port.icount.rx++;
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rx = imx_uart_readl(sport, URXD0);
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- temp = imx_uart_readl(sport, USR2);
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- if (temp & USR2_BRCD) {
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+ usr2 = imx_uart_readl(sport, USR2);
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+ if (usr2 & USR2_BRCD) {
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imx_uart_writel(sport, USR2_BRCD, USR2);
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if (uart_handle_break(&sport->port))
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continue;
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@@ -920,25 +924,27 @@ static unsigned int imx_get_mctrl(struct uart_port *port)
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static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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struct imx_port *sport = (struct imx_port *)port;
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- unsigned long temp;
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+ u32 ucr3, uts;
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if (!(port->rs485.flags & SER_RS485_ENABLED)) {
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- temp = imx_uart_readl(sport, UCR2);
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- temp &= ~(UCR2_CTS | UCR2_CTSC);
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+ u32 ucr2;
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+
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+ ucr2 = imx_uart_readl(sport, UCR2);
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+ ucr2 &= ~(UCR2_CTS | UCR2_CTSC);
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if (mctrl & TIOCM_RTS)
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- temp |= UCR2_CTS | UCR2_CTSC;
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- imx_uart_writel(sport, temp, UCR2);
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+ ucr2 |= UCR2_CTS | UCR2_CTSC;
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+ imx_uart_writel(sport, ucr2, UCR2);
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}
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- temp = imx_uart_readl(sport, UCR3) & ~UCR3_DSR;
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+ ucr3 = imx_uart_readl(sport, UCR3) & ~UCR3_DSR;
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if (!(mctrl & TIOCM_DTR))
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- temp |= UCR3_DSR;
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- imx_uart_writel(sport, temp, UCR3);
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+ ucr3 |= UCR3_DSR;
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+ imx_uart_writel(sport, ucr3, UCR3);
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- temp = imx_uart_readl(sport, uts_reg(sport)) & ~UTS_LOOP;
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+ uts = imx_uart_readl(sport, uts_reg(sport)) & ~UTS_LOOP;
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if (mctrl & TIOCM_LOOP)
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- temp |= UTS_LOOP;
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- imx_uart_writel(sport, temp, uts_reg(sport));
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+ uts |= UTS_LOOP;
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+ imx_uart_writel(sport, uts, uts_reg(sport));
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mctrl_gpio_set(sport->gpios, mctrl);
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}
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@@ -949,16 +955,17 @@ static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
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static void imx_break_ctl(struct uart_port *port, int break_state)
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{
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struct imx_port *sport = (struct imx_port *)port;
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- unsigned long flags, temp;
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+ unsigned long flags;
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+ u32 ucr1;
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spin_lock_irqsave(&sport->port.lock, flags);
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- temp = imx_uart_readl(sport, UCR1) & ~UCR1_SNDBRK;
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+ ucr1 = imx_uart_readl(sport, UCR1) & ~UCR1_SNDBRK;
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if (break_state != 0)
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- temp |= UCR1_SNDBRK;
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+ ucr1 |= UCR1_SNDBRK;
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- imx_uart_writel(sport, temp, UCR1);
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+ imx_uart_writel(sport, ucr1, UCR1);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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}
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@@ -1108,12 +1115,12 @@ static int start_rx_dma(struct imx_port *sport)
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static void clear_rx_errors(struct imx_port *sport)
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{
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struct tty_port *port = &sport->port.state->port;
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- unsigned int status_usr1, status_usr2;
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+ u32 usr1, usr2;
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- status_usr1 = imx_uart_readl(sport, USR1);
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- status_usr2 = imx_uart_readl(sport, USR2);
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+ usr1 = imx_uart_readl(sport, USR1);
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+ usr2 = imx_uart_readl(sport, USR2);
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- if (status_usr2 & USR2_BRCD) {
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+ if (usr2 & USR2_BRCD) {
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sport->port.icount.brk++;
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imx_uart_writel(sport, USR2_BRCD, USR2);
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uart_handle_break(&sport->port);
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@@ -1122,16 +1129,16 @@ static void clear_rx_errors(struct imx_port *sport)
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tty_flip_buffer_push(port);
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} else {
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dev_err(sport->port.dev, "DMA transaction error.\n");
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- if (status_usr1 & USR1_FRAMERR) {
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+ if (usr1 & USR1_FRAMERR) {
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sport->port.icount.frame++;
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imx_uart_writel(sport, USR1_FRAMERR, USR1);
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- } else if (status_usr1 & USR1_PARITYERR) {
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+ } else if (usr1 & USR1_PARITYERR) {
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sport->port.icount.parity++;
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imx_uart_writel(sport, USR1_PARITYERR, USR1);
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}
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}
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- if (status_usr2 & USR2_ORE) {
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+ if (usr2 & USR2_ORE) {
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sport->port.icount.overrun++;
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imx_uart_writel(sport, USR2_ORE, USR2);
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}
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@@ -1230,12 +1237,12 @@ err:
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static void imx_enable_dma(struct imx_port *sport)
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{
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- unsigned long temp;
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+ u32 ucr1;
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/* set UCR1 */
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- temp = imx_uart_readl(sport, UCR1);
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- temp |= UCR1_RXDMAEN | UCR1_TXDMAEN | UCR1_ATDMAEN;
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- imx_uart_writel(sport, temp, UCR1);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ ucr1 |= UCR1_RXDMAEN | UCR1_TXDMAEN | UCR1_ATDMAEN;
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+ imx_uart_writel(sport, ucr1, UCR1);
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imx_setup_ufcr(sport, TXTL_DMA, RXTL_DMA);
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@@ -1244,17 +1251,17 @@ static void imx_enable_dma(struct imx_port *sport)
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static void imx_disable_dma(struct imx_port *sport)
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{
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- unsigned long temp;
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+ u32 ucr1, ucr2;
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/* clear UCR1 */
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- temp = imx_uart_readl(sport, UCR1);
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- temp &= ~(UCR1_RXDMAEN | UCR1_TXDMAEN | UCR1_ATDMAEN);
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- imx_uart_writel(sport, temp, UCR1);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ ucr1 &= ~(UCR1_RXDMAEN | UCR1_TXDMAEN | UCR1_ATDMAEN);
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+ imx_uart_writel(sport, ucr1, UCR1);
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/* clear UCR2 */
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- temp = imx_uart_readl(sport, UCR2);
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- temp &= ~(UCR2_CTSC | UCR2_CTS | UCR2_ATEN);
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- imx_uart_writel(sport, temp, UCR2);
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+ ucr2 = imx_uart_readl(sport, UCR2);
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+ ucr2 &= ~(UCR2_CTSC | UCR2_CTS | UCR2_ATEN);
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+ imx_uart_writel(sport, ucr2, UCR2);
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imx_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT);
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@@ -1268,8 +1275,9 @@ static int imx_startup(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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int retval, i;
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- unsigned long flags, temp;
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+ unsigned long flags;
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int dma_is_inited = 0;
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+ u32 ucr1, ucr2, ucr4;
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retval = clk_prepare_enable(sport->clk_per);
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if (retval)
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@@ -1285,13 +1293,13 @@ static int imx_startup(struct uart_port *port)
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/* disable the DREN bit (Data Ready interrupt enable) before
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* requesting IRQs
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*/
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- temp = imx_uart_readl(sport, UCR4);
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+ ucr4 = imx_uart_readl(sport, UCR4);
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/* set the trigger level for CTS */
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- temp &= ~(UCR4_CTSTL_MASK << UCR4_CTSTL_SHF);
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- temp |= CTSTL << UCR4_CTSTL_SHF;
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+ ucr4 &= ~(UCR4_CTSTL_MASK << UCR4_CTSTL_SHF);
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+ ucr4 |= CTSTL << UCR4_CTSTL_SHF;
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- imx_uart_writel(sport, temp & ~UCR4_DREN, UCR4);
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+ imx_uart_writel(sport, ucr4 & ~UCR4_DREN, UCR4);
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/* Can we enable the DMA support? */
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if (!uart_console(port) && imx_uart_dma_init(sport) == 0)
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@@ -1301,9 +1309,9 @@ static int imx_startup(struct uart_port *port)
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/* Reset fifo's and state machines */
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i = 100;
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- temp = imx_uart_readl(sport, UCR2);
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- temp &= ~UCR2_SRST;
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- imx_uart_writel(sport, temp, UCR2);
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+ ucr2 = imx_uart_readl(sport, UCR2);
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+ ucr2 &= ~UCR2_SRST;
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+ imx_uart_writel(sport, ucr2, UCR2);
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while (!(imx_uart_readl(sport, UCR2) & UCR2_SRST) && (--i > 0))
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udelay(1);
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@@ -1317,42 +1325,44 @@ static int imx_startup(struct uart_port *port)
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if (dma_is_inited)
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imx_enable_dma(sport);
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- temp = imx_uart_readl(sport, UCR1) & ~UCR1_RRDYEN;
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+ ucr1 = imx_uart_readl(sport, UCR1) & ~UCR1_RRDYEN;
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if (!sport->dma_is_enabled)
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- temp |= UCR1_RRDYEN;
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- temp |= UCR1_UARTEN;
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+ ucr1 |= UCR1_RRDYEN;
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+ ucr1 |= UCR1_UARTEN;
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if (sport->have_rtscts)
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- temp |= UCR1_RTSDEN;
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+ ucr1 |= UCR1_RTSDEN;
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- imx_uart_writel(sport, temp, UCR1);
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+ imx_uart_writel(sport, ucr1, UCR1);
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- temp = imx_uart_readl(sport, UCR4) & ~UCR4_OREN;
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+ ucr4 = imx_uart_readl(sport, UCR4) & ~UCR4_OREN;
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if (!sport->dma_is_enabled)
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- temp |= UCR4_OREN;
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- imx_uart_writel(sport, temp, UCR4);
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+ ucr4 |= UCR4_OREN;
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+ imx_uart_writel(sport, ucr4, UCR4);
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- temp = imx_uart_readl(sport, UCR2) & ~UCR2_ATEN;
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- temp |= (UCR2_RXEN | UCR2_TXEN);
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+ ucr2 = imx_uart_readl(sport, UCR2) & ~UCR2_ATEN;
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+ ucr2 |= (UCR2_RXEN | UCR2_TXEN);
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if (!sport->have_rtscts)
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- temp |= UCR2_IRTS;
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+ ucr2 |= UCR2_IRTS;
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/*
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* make sure the edge sensitive RTS-irq is disabled,
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* we're using RTSD instead.
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*/
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if (!is_imx1_uart(sport))
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- temp &= ~UCR2_RTSEN;
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- imx_uart_writel(sport, temp, UCR2);
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+ ucr2 &= ~UCR2_RTSEN;
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+ imx_uart_writel(sport, ucr2, UCR2);
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if (!is_imx1_uart(sport)) {
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- temp = imx_uart_readl(sport, UCR3);
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+ u32 ucr3;
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+
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+ ucr3 = imx_uart_readl(sport, UCR3);
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- temp |= UCR3_DTRDEN | UCR3_RI | UCR3_DCD;
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+ ucr3 |= UCR3_DTRDEN | UCR3_RI | UCR3_DCD;
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if (sport->dte_mode)
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/* disable broken interrupts */
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- temp &= ~(UCR3_RI | UCR3_DCD);
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+ ucr3 &= ~(UCR3_RI | UCR3_DCD);
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- imx_uart_writel(sport, temp, UCR3);
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+ imx_uart_writel(sport, ucr3, UCR3);
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}
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/*
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@@ -1376,8 +1386,8 @@ static int imx_startup(struct uart_port *port)
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static void imx_shutdown(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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- unsigned long temp;
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unsigned long flags;
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+ u32 ucr1, ucr2;
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if (sport->dma_is_enabled) {
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sport->dma_is_rxing = 0;
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@@ -1396,9 +1406,9 @@ static void imx_shutdown(struct uart_port *port)
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mctrl_gpio_disable_ms(sport->gpios);
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spin_lock_irqsave(&sport->port.lock, flags);
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- temp = imx_uart_readl(sport, UCR2);
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- temp &= ~(UCR2_TXEN);
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- imx_uart_writel(sport, temp, UCR2);
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+ ucr2 = imx_uart_readl(sport, UCR2);
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+ ucr2 &= ~UCR2_TXEN;
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+ imx_uart_writel(sport, ucr2, UCR2);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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/*
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@@ -1411,10 +1421,10 @@ static void imx_shutdown(struct uart_port *port)
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*/
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spin_lock_irqsave(&sport->port.lock, flags);
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- temp = imx_uart_readl(sport, UCR1);
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- temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
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- imx_uart_writel(sport, temp, UCR1);
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+ imx_uart_writel(sport, ucr1, UCR1);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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clk_disable_unprepare(sport->clk_per);
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@@ -1426,7 +1436,7 @@ static void imx_flush_buffer(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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struct scatterlist *sgl = &sport->tx_sgl[0];
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- unsigned long temp;
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+ u32 ucr2;
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int i = 100, ubir, ubmr, uts;
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if (!sport->dma_chan_tx)
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@@ -1435,11 +1445,13 @@ static void imx_flush_buffer(struct uart_port *port)
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sport->tx_bytes = 0;
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dmaengine_terminate_all(sport->dma_chan_tx);
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if (sport->dma_is_txing) {
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+ u32 ucr1;
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+
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dma_unmap_sg(sport->port.dev, sgl, sport->dma_tx_nents,
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DMA_TO_DEVICE);
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- temp = imx_uart_readl(sport, UCR1);
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- temp &= ~UCR1_TXDMAEN;
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- imx_uart_writel(sport, temp, UCR1);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ ucr1 &= ~UCR1_TXDMAEN;
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+ imx_uart_writel(sport, ucr1, UCR1);
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sport->dma_is_txing = 0;
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}
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@@ -1458,9 +1470,9 @@ static void imx_flush_buffer(struct uart_port *port)
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ubmr = imx_uart_readl(sport, UBMR);
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uts = imx_uart_readl(sport, IMX21_UTS);
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- temp = imx_uart_readl(sport, UCR2);
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- temp &= ~UCR2_SRST;
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- imx_uart_writel(sport, temp, UCR2);
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+ ucr2 = imx_uart_readl(sport, UCR2);
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+ ucr2 &= ~UCR2_SRST;
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+ imx_uart_writel(sport, ucr2, UCR2);
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while (!(imx_uart_readl(sport, UCR2) & UCR2_SRST) && (--i > 0))
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udelay(1);
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@@ -1477,10 +1489,10 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
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{
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struct imx_port *sport = (struct imx_port *)port;
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unsigned long flags;
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- unsigned long ucr2, old_ucr1, old_ucr2;
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+ u32 ucr2, old_ucr1, old_ucr2, ufcr;
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unsigned int baud, quot;
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unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
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- unsigned long div, ufcr;
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+ unsigned long div;
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unsigned long num, denom;
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uint64_t tdiv64;
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@@ -1690,7 +1702,7 @@ static int imx_poll_init(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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unsigned long flags;
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- unsigned long temp;
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+ u32 ucr1, ucr2;
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int retval;
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retval = clk_prepare_enable(sport->clk_ipg);
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@@ -1704,16 +1716,16 @@ static int imx_poll_init(struct uart_port *port)
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spin_lock_irqsave(&sport->port.lock, flags);
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- temp = imx_uart_readl(sport, UCR1);
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+ ucr1 = imx_uart_readl(sport, UCR1);
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if (is_imx1_uart(sport))
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- temp |= IMX1_UCR1_UARTCLKEN;
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- temp |= UCR1_UARTEN | UCR1_RRDYEN;
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- temp &= ~(UCR1_TXMPTYEN | UCR1_RTSDEN);
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- imx_uart_writel(sport, temp, UCR1);
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+ ucr1 |= IMX1_UCR1_UARTCLKEN;
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+ ucr1 |= UCR1_UARTEN | UCR1_RRDYEN;
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+ ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RTSDEN);
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+ imx_uart_writel(sport, ucr1, UCR1);
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- temp = imx_uart_readl(sport, UCR2);
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- temp |= UCR2_RXEN;
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- imx_uart_writel(sport, temp, UCR2);
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+ ucr2 = imx_uart_readl(sport, UCR2);
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+ ucr2 |= UCR2_RXEN;
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+ imx_uart_writel(sport, ucr2, UCR2);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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@@ -1754,7 +1766,7 @@ static int imx_rs485_config(struct uart_port *port,
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struct serial_rs485 *rs485conf)
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{
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struct imx_port *sport = (struct imx_port *)port;
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- unsigned long temp;
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+ u32 ucr2;
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/* unimplemented */
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rs485conf->delay_rts_before_send = 0;
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@@ -1766,20 +1778,20 @@ static int imx_rs485_config(struct uart_port *port,
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if (rs485conf->flags & SER_RS485_ENABLED) {
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/* disable transmitter */
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- temp = imx_uart_readl(sport, UCR2);
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+ ucr2 = imx_uart_readl(sport, UCR2);
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if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND)
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- imx_port_rts_active(sport, &temp);
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+ imx_port_rts_active(sport, &ucr2);
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else
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- imx_port_rts_inactive(sport, &temp);
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- imx_uart_writel(sport, temp, UCR2);
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+ imx_port_rts_inactive(sport, &ucr2);
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+ imx_uart_writel(sport, ucr2, UCR2);
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}
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/* Make sure Rx is enabled in case Tx is active with Rx disabled */
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if (!(rs485conf->flags & SER_RS485_ENABLED) ||
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rs485conf->flags & SER_RS485_RX_DURING_TX) {
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- temp = imx_uart_readl(sport, UCR2);
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- temp |= UCR2_RXEN;
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- imx_uart_writel(sport, temp, UCR2);
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+ ucr2 = imx_uart_readl(sport, UCR2);
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+ ucr2 |= UCR2_RXEN;
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+ imx_uart_writel(sport, ucr2, UCR2);
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}
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port->rs485 = *rs485conf;
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@@ -2118,7 +2130,8 @@ static int serial_imx_probe(struct platform_device *pdev)
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{
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struct imx_port *sport;
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void __iomem *base;
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- int ret = 0, reg;
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+ int ret = 0;
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+ u32 ucr1;
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struct resource *res;
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int txirq, rxirq, rtsirq;
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@@ -2202,10 +2215,10 @@ static int serial_imx_probe(struct platform_device *pdev)
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imx_rs485_config(&sport->port, &sport->port.rs485);
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/* Disable interrupts before requesting them */
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- reg = imx_uart_readl(sport, UCR1);
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- reg &= ~(UCR1_ADEN | UCR1_TRDYEN | UCR1_IDEN | UCR1_RRDYEN |
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+ ucr1 = imx_uart_readl(sport, UCR1);
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+ ucr1 &= ~(UCR1_ADEN | UCR1_TRDYEN | UCR1_IDEN | UCR1_RRDYEN |
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UCR1_TXMPTYEN | UCR1_RTSDEN);
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- imx_uart_writel(sport, reg, UCR1);
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+ imx_uart_writel(sport, ucr1, UCR1);
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|
|
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if (!is_imx1_uart(sport) && sport->dte_mode) {
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|
/*
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@@ -2214,9 +2227,9 @@ static int serial_imx_probe(struct platform_device *pdev)
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* and DCD (when they are outputs) or enables the respective
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* irqs. So set this bit early, i.e. before requesting irqs.
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*/
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- reg = imx_uart_readl(sport, UFCR);
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- if (!(reg & UFCR_DCEDTE))
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|
- imx_uart_writel(sport, reg | UFCR_DCEDTE, UFCR);
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+ u32 ufcr = imx_uart_readl(sport, UFCR);
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+ if (!(ufcr & UFCR_DCEDTE))
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+ imx_uart_writel(sport, ufcr | UFCR_DCEDTE, UFCR);
|
|
|
|
|
|
/*
|
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|
* Disable UCR3_RI and UCR3_DCD irqs. They are also not
|
|
@@ -2228,11 +2241,10 @@ static int serial_imx_probe(struct platform_device *pdev)
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|
UCR3);
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|
|
|
|
|
} else {
|
|
|
- unsigned long ucr3 = UCR3_DSR;
|
|
|
-
|
|
|
- reg = imx_uart_readl(sport, UFCR);
|
|
|
- if (reg & UFCR_DCEDTE)
|
|
|
- imx_uart_writel(sport, reg & ~UFCR_DCEDTE, UFCR);
|
|
|
+ u32 ucr3 = UCR3_DSR;
|
|
|
+ u32 ufcr = imx_uart_readl(sport, UFCR);
|
|
|
+ if (ufcr & UFCR_DCEDTE)
|
|
|
+ imx_uart_writel(sport, ufcr & ~UFCR_DCEDTE, UFCR);
|
|
|
|
|
|
if (!is_imx1_uart(sport))
|
|
|
ucr3 |= IMX21_UCR3_RXDMUXSEL | UCR3_ADNIMP;
|
|
@@ -2320,24 +2332,24 @@ static void serial_imx_save_context(struct imx_port *sport)
|
|
|
|
|
|
static void serial_imx_enable_wakeup(struct imx_port *sport, bool on)
|
|
|
{
|
|
|
- unsigned int val;
|
|
|
+ u32 ucr3;
|
|
|
|
|
|
- val = imx_uart_readl(sport, UCR3);
|
|
|
+ ucr3 = imx_uart_readl(sport, UCR3);
|
|
|
if (on) {
|
|
|
imx_uart_writel(sport, USR1_AWAKE, USR1);
|
|
|
- val |= UCR3_AWAKEN;
|
|
|
+ ucr3 |= UCR3_AWAKEN;
|
|
|
+ } else {
|
|
|
+ ucr3 &= ~UCR3_AWAKEN;
|
|
|
}
|
|
|
- else
|
|
|
- val &= ~UCR3_AWAKEN;
|
|
|
- imx_uart_writel(sport, val, UCR3);
|
|
|
+ imx_uart_writel(sport, ucr3, UCR3);
|
|
|
|
|
|
if (sport->have_rtscts) {
|
|
|
- val = imx_uart_readl(sport, UCR1);
|
|
|
+ u32 ucr1 = imx_uart_readl(sport, UCR1);
|
|
|
if (on)
|
|
|
- val |= UCR1_RTSDEN;
|
|
|
+ ucr1 |= UCR1_RTSDEN;
|
|
|
else
|
|
|
- val &= ~UCR1_RTSDEN;
|
|
|
- imx_uart_writel(sport, val, UCR1);
|
|
|
+ ucr1 &= ~UCR1_RTSDEN;
|
|
|
+ imx_uart_writel(sport, ucr1, UCR1);
|
|
|
}
|
|
|
}
|
|
|
|