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@@ -190,8 +190,10 @@ static int error_context(struct mce *m)
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* See AMD Error Scope Hierarchy table in a newer BKDG. For example
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* 49125_15h_Models_30h-3Fh_BKDG.pdf, section "RAS Features"
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*/
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-static int mce_severity_amd(struct mce *m, enum context ctx)
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+static int mce_severity_amd(struct mce *m, int tolerant, char **msg, bool is_excp)
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{
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+ enum context ctx = error_context(m);
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+
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/* Processor Context Corrupt, no need to fumble too much, die! */
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if (m->status & MCI_STATUS_PCC)
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return MCE_PANIC_SEVERITY;
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@@ -239,15 +241,12 @@ static int mce_severity_amd(struct mce *m, enum context ctx)
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return MCE_KEEP_SEVERITY;
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}
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-int mce_severity(struct mce *m, int tolerant, char **msg, bool is_excp)
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+static int mce_severity_intel(struct mce *m, int tolerant, char **msg, bool is_excp)
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{
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enum exception excp = (is_excp ? EXCP_CONTEXT : NO_EXCP);
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enum context ctx = error_context(m);
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struct severity *s;
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- if (m->cpuvendor == X86_VENDOR_AMD)
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- return mce_severity_amd(m, ctx);
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-
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for (s = severities;; s++) {
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if ((m->status & s->mask) != s->result)
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continue;
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@@ -272,6 +271,16 @@ int mce_severity(struct mce *m, int tolerant, char **msg, bool is_excp)
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}
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}
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+/* Default to mce_severity_intel */
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+int (*mce_severity)(struct mce *m, int tolerant, char **msg, bool is_excp) =
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+ mce_severity_intel;
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+
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+void __init mcheck_vendor_init_severity(void)
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+{
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+ if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
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+ mce_severity = mce_severity_amd;
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+}
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+
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#ifdef CONFIG_DEBUG_FS
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static void *s_start(struct seq_file *f, loff_t *pos)
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{
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