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@@ -1,3 +1,6 @@
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+#include <linux/err.h>
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+#include <linux/slab.h>
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+
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#include <asm/branch.h>
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#include <asm/cacheflush.h>
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#include <asm/fpu_emulator.h>
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@@ -5,43 +8,211 @@
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#include <asm/mipsregs.h>
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#include <asm/uaccess.h>
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-#include "ieee754.h"
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-
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-/*
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- * Emulate the arbitrary instruction ir at xcp->cp0_epc. Required when
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- * we have to emulate the instruction in a COP1 branch delay slot. Do
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- * not change cp0_epc due to the instruction
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+/**
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+ * struct emuframe - The 'emulation' frame structure
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+ * @emul: The instruction to 'emulate'.
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+ * @badinst: A break instruction to cause a return to the kernel.
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*
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- * According to the spec:
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- * 1) it shouldn't be a branch :-)
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- * 2) it can be a COP instruction :-(
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- * 3) if we are tring to run a protected memory space we must take
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- * special care on memory access instructions :-(
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- */
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-
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-/*
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- * "Trampoline" return routine to catch exception following
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- * execution of delay-slot instruction execution.
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+ * This structure defines the frames placed within the delay slot emulation
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+ * page in response to a call to mips_dsemul(). Each thread may be allocated
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+ * only one frame at any given time. The kernel stores within it the
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+ * instruction to be 'emulated' followed by a break instruction, then
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+ * executes the frame in user mode. The break causes a trap to the kernel
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+ * which leads to do_dsemulret() being called unless the instruction in
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+ * @emul causes a trap itself, is a branch, or a signal is delivered to
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+ * the thread. In these cases the allocated frame will either be reused by
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+ * a subsequent delay slot 'emulation', or be freed during signal delivery or
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+ * upon thread exit.
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+ *
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+ * This approach is used because:
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+ *
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+ * - Actually emulating all instructions isn't feasible. We would need to
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+ * be able to handle instructions from all revisions of the MIPS ISA,
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+ * all ASEs & all vendor instruction set extensions. This would be a
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+ * whole lot of work & continual maintenance burden as new instructions
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+ * are introduced, and in the case of some vendor extensions may not
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+ * even be possible. Thus we need to take the approach of actually
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+ * executing the instruction.
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+ *
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+ * - We must execute the instruction within user context. If we were to
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+ * execute the instruction in kernel mode then it would have access to
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+ * kernel resources without very careful checks, leaving us with a
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+ * high potential for security or stability issues to arise.
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+ *
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+ * - We used to place the frame on the users stack, but this requires
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+ * that the stack be executable. This is bad for security so the
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+ * per-process page is now used instead.
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+ *
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+ * - The instruction in @emul may be something entirely invalid for a
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+ * delay slot. The user may (intentionally or otherwise) place a branch
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+ * in a delay slot, or a kernel mode instruction, or something else
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+ * which generates an exception. Thus we can't rely upon the break in
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+ * @badinst always being hit. For this reason we track the index of the
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+ * frame allocated to each thread, allowing us to clean it up at later
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+ * points such as signal delivery or thread exit.
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+ *
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+ * - The user may generate a fake struct emuframe if they wish, invoking
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+ * the BRK_MEMU break instruction themselves. We must therefore not
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+ * trust that BRK_MEMU means there's actually a valid frame allocated
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+ * to the thread, and must not allow the user to do anything they
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+ * couldn't already.
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*/
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-
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struct emuframe {
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mips_instruction emul;
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mips_instruction badinst;
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- mips_instruction cookie;
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- unsigned long epc;
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};
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-/*
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- * Set up an emulation frame for instruction IR, from a delay slot of
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- * a branch jumping to CPC. Return 0 if successful, -1 if no emulation
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- * required, otherwise a signal number causing a frame setup failure.
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- */
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-int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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+static const int emupage_frame_count = PAGE_SIZE / sizeof(struct emuframe);
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+
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+static inline __user struct emuframe *dsemul_page(void)
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+{
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+ return (__user struct emuframe *)STACK_TOP;
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+}
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+
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+static int alloc_emuframe(void)
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+{
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+ mm_context_t *mm_ctx = ¤t->mm->context;
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+ int idx;
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+
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+retry:
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+ spin_lock(&mm_ctx->bd_emupage_lock);
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+
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+ /* Ensure we have an allocation bitmap */
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+ if (!mm_ctx->bd_emupage_allocmap) {
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+ mm_ctx->bd_emupage_allocmap =
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+ kcalloc(BITS_TO_LONGS(emupage_frame_count),
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+ sizeof(unsigned long),
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+ GFP_ATOMIC);
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+
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+ if (!mm_ctx->bd_emupage_allocmap) {
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+ idx = BD_EMUFRAME_NONE;
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+ goto out_unlock;
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+ }
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+ }
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+
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+ /* Attempt to allocate a single bit/frame */
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+ idx = bitmap_find_free_region(mm_ctx->bd_emupage_allocmap,
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+ emupage_frame_count, 0);
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+ if (idx < 0) {
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+ /*
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+ * Failed to allocate a frame. We'll wait until one becomes
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+ * available. We unlock the page so that other threads actually
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+ * get the opportunity to free their frames, which means
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+ * technically the result of bitmap_full may be incorrect.
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+ * However the worst case is that we repeat all this and end up
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+ * back here again.
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+ */
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+ spin_unlock(&mm_ctx->bd_emupage_lock);
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+ if (!wait_event_killable(mm_ctx->bd_emupage_queue,
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+ !bitmap_full(mm_ctx->bd_emupage_allocmap,
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+ emupage_frame_count)))
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+ goto retry;
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+
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+ /* Received a fatal signal - just give in */
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+ return BD_EMUFRAME_NONE;
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+ }
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+
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+ /* Success! */
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+ pr_debug("allocate emuframe %d to %d\n", idx, current->pid);
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+out_unlock:
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+ spin_unlock(&mm_ctx->bd_emupage_lock);
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+ return idx;
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+}
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+
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+static void free_emuframe(int idx, struct mm_struct *mm)
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+{
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+ mm_context_t *mm_ctx = &mm->context;
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+
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+ spin_lock(&mm_ctx->bd_emupage_lock);
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+
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+ pr_debug("free emuframe %d from %d\n", idx, current->pid);
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+ bitmap_clear(mm_ctx->bd_emupage_allocmap, idx, 1);
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+
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+ /* If some thread is waiting for a frame, now's its chance */
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+ wake_up(&mm_ctx->bd_emupage_queue);
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+
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+ spin_unlock(&mm_ctx->bd_emupage_lock);
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+}
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+
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+static bool within_emuframe(struct pt_regs *regs)
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+{
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+ unsigned long base = (unsigned long)dsemul_page();
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+
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+ if (regs->cp0_epc < base)
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+ return false;
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+ if (regs->cp0_epc >= (base + PAGE_SIZE))
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+ return false;
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+
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+ return true;
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+}
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+
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+bool dsemul_thread_cleanup(struct task_struct *tsk)
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+{
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+ int fr_idx;
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+
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+ /* Clear any allocated frame, retrieving its index */
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+ fr_idx = atomic_xchg(&tsk->thread.bd_emu_frame, BD_EMUFRAME_NONE);
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+
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+ /* If no frame was allocated, we're done */
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+ if (fr_idx == BD_EMUFRAME_NONE)
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+ return false;
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+
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+ task_lock(tsk);
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+
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+ /* Free the frame that this thread had allocated */
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+ if (tsk->mm)
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+ free_emuframe(fr_idx, tsk->mm);
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+
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+ task_unlock(tsk);
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+ return true;
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+}
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+
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+bool dsemul_thread_rollback(struct pt_regs *regs)
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+{
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+ struct emuframe __user *fr;
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+ int fr_idx;
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+
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+ /* Do nothing if we're not executing from a frame */
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+ if (!within_emuframe(regs))
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+ return false;
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+
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+ /* Find the frame being executed */
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+ fr_idx = atomic_read(¤t->thread.bd_emu_frame);
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+ if (fr_idx == BD_EMUFRAME_NONE)
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+ return false;
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+ fr = &dsemul_page()[fr_idx];
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+
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+ /*
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+ * If the PC is at the emul instruction, roll back to the branch. If
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+ * PC is at the badinst (break) instruction, we've already emulated the
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+ * instruction so progress to the continue PC. If it's anything else
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+ * then something is amiss & the user has branched into some other area
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+ * of the emupage - we'll free the allocated frame anyway.
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+ */
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+ if (msk_isa16_mode(regs->cp0_epc) == (unsigned long)&fr->emul)
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+ regs->cp0_epc = current->thread.bd_emu_branch_pc;
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+ else if (msk_isa16_mode(regs->cp0_epc) == (unsigned long)&fr->badinst)
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+ regs->cp0_epc = current->thread.bd_emu_cont_pc;
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+
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+ atomic_set(¤t->thread.bd_emu_frame, BD_EMUFRAME_NONE);
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+ free_emuframe(fr_idx, current->mm);
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+ return true;
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+}
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+
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+void dsemul_mm_cleanup(struct mm_struct *mm)
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+{
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+ mm_context_t *mm_ctx = &mm->context;
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+
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+ kfree(mm_ctx->bd_emupage_allocmap);
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+}
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+
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+int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
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+ unsigned long branch_pc, unsigned long cont_pc)
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{
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int isa16 = get_isa16_mode(regs->cp0_epc);
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mips_instruction break_math;
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struct emuframe __user *fr;
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- int err;
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+ int err, fr_idx;
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/* NOP is easy */
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if (ir == 0)
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@@ -68,30 +239,20 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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}
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}
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- pr_debug("dsemul %lx %lx\n", regs->cp0_epc, cpc);
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+ pr_debug("dsemul 0x%08lx cont at 0x%08lx\n", regs->cp0_epc, cont_pc);
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- /*
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- * The strategy is to push the instruction onto the user stack
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- * and put a trap after it which we can catch and jump to
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- * the required address any alternative apart from full
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- * instruction emulation!!.
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- *
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- * Algorithmics used a system call instruction, and
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- * borrowed that vector. MIPS/Linux version is a bit
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- * more heavyweight in the interests of portability and
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- * multiprocessor support. For Linux we use a BREAK 514
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- * instruction causing a breakpoint exception.
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- */
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- break_math = BREAK_MATH(isa16);
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-
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- /* Ensure that the two instructions are in the same cache line */
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- fr = (struct emuframe __user *)
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- ((regs->regs[29] - sizeof(struct emuframe)) & ~0x7);
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-
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- /* Verify that the stack pointer is not completely insane */
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- if (unlikely(!access_ok(VERIFY_WRITE, fr, sizeof(struct emuframe))))
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+ /* Allocate a frame if we don't already have one */
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+ fr_idx = atomic_read(¤t->thread.bd_emu_frame);
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+ if (fr_idx == BD_EMUFRAME_NONE)
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+ fr_idx = alloc_emuframe();
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+ if (fr_idx == BD_EMUFRAME_NONE)
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return SIGBUS;
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+ fr = &dsemul_page()[fr_idx];
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+
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+ /* Retrieve the appropriately encoded break instruction */
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+ break_math = BREAK_MATH(isa16);
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+ /* Write the instructions to the frame */
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if (isa16) {
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err = __put_user(ir >> 16,
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(u16 __user *)(&fr->emul));
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@@ -106,84 +267,36 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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err |= __put_user(break_math, &fr->badinst);
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}
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- err |= __put_user((mips_instruction)BD_COOKIE, &fr->cookie);
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- err |= __put_user(cpc, &fr->epc);
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-
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if (unlikely(err)) {
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MIPS_FPU_EMU_INC_STATS(errors);
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+ free_emuframe(fr_idx, current->mm);
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return SIGBUS;
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}
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+ /* Record the PC of the branch, PC to continue from & frame index */
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+ current->thread.bd_emu_branch_pc = branch_pc;
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+ current->thread.bd_emu_cont_pc = cont_pc;
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+ atomic_set(¤t->thread.bd_emu_frame, fr_idx);
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+
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+ /* Change user register context to execute the frame */
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regs->cp0_epc = (unsigned long)&fr->emul | isa16;
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+ /* Ensure the icache observes our newly written frame */
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flush_cache_sigtramp((unsigned long)&fr->emul);
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return 0;
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}
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-int do_dsemulret(struct pt_regs *xcp)
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+bool do_dsemulret(struct pt_regs *xcp)
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{
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- int isa16 = get_isa16_mode(xcp->cp0_epc);
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- struct emuframe __user *fr;
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- unsigned long epc;
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- u32 insn, cookie;
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- int err = 0;
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- u16 instr[2];
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-
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- fr = (struct emuframe __user *)
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- (msk_isa16_mode(xcp->cp0_epc) - sizeof(mips_instruction));
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-
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- /*
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- * If we can't even access the area, something is very wrong, but we'll
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- * leave that to the default handling
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- */
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- if (!access_ok(VERIFY_READ, fr, sizeof(struct emuframe)))
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- return 0;
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-
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- /*
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- * Do some sanity checking on the stackframe:
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- *
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- * - Is the instruction pointed to by the EPC an BREAK_MATH?
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- * - Is the following memory word the BD_COOKIE?
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- */
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- if (isa16) {
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- err = __get_user(instr[0],
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- (u16 __user *)(&fr->badinst));
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- err |= __get_user(instr[1],
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- (u16 __user *)((long)(&fr->badinst) + 2));
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- insn = (instr[0] << 16) | instr[1];
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- } else {
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- err = __get_user(insn, &fr->badinst);
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- }
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- err |= __get_user(cookie, &fr->cookie);
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-
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- if (unlikely(err ||
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- insn != BREAK_MATH(isa16) || cookie != BD_COOKIE)) {
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+ /* Cleanup the allocated frame, returning if there wasn't one */
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+ if (!dsemul_thread_cleanup(current)) {
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MIPS_FPU_EMU_INC_STATS(errors);
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- return 0;
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- }
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-
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- /*
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- * At this point, we are satisfied that it's a BD emulation trap. Yes,
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- * a user might have deliberately put two malformed and useless
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- * instructions in a row in his program, in which case he's in for a
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- * nasty surprise - the next instruction will be treated as a
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- * continuation address! Alas, this seems to be the only way that we
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- * can handle signals, recursion, and longjmps() in the context of
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- * emulating the branch delay instruction.
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- */
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-
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- pr_debug("dsemulret\n");
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-
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- if (__get_user(epc, &fr->epc)) { /* Saved EPC */
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- /* This is not a good situation to be in */
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- force_sig(SIGBUS, current);
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-
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- return 0;
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+ return false;
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}
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/* Set EPC to return to post-branch instruction */
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- xcp->cp0_epc = epc;
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- MIPS_FPU_EMU_INC_STATS(ds_emul);
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- return 1;
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+ xcp->cp0_epc = current->thread.bd_emu_cont_pc;
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+ pr_debug("dsemulret to 0x%08lx\n", xcp->cp0_epc);
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+ return true;
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}
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Paul Burton