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@@ -320,40 +320,39 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
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sda_falling_time = dev->sda_falling_time ?: 300; /* ns */
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sda_falling_time = dev->sda_falling_time ?: 300; /* ns */
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scl_falling_time = dev->scl_falling_time ?: 300; /* ns */
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scl_falling_time = dev->scl_falling_time ?: 300; /* ns */
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- /* Standard-mode */
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- hcnt = i2c_dw_scl_hcnt(input_clock_khz,
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- 4000, /* tHD;STA = tHIGH = 4.0 us */
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- sda_falling_time,
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- 0, /* 0: DW default, 1: Ideal */
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- 0); /* No offset */
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- lcnt = i2c_dw_scl_lcnt(input_clock_khz,
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- 4700, /* tLOW = 4.7 us */
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- scl_falling_time,
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- 0); /* No offset */
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-
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- /* Allow platforms to specify the ideal HCNT and LCNT values */
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+ /* Set SCL timing parameters for standard-mode */
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if (dev->ss_hcnt && dev->ss_lcnt) {
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if (dev->ss_hcnt && dev->ss_lcnt) {
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hcnt = dev->ss_hcnt;
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hcnt = dev->ss_hcnt;
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lcnt = dev->ss_lcnt;
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lcnt = dev->ss_lcnt;
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+ } else {
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+ hcnt = i2c_dw_scl_hcnt(input_clock_khz,
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+ 4000, /* tHD;STA = tHIGH = 4.0 us */
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+ sda_falling_time,
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+ 0, /* 0: DW default, 1: Ideal */
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+ 0); /* No offset */
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+ lcnt = i2c_dw_scl_lcnt(input_clock_khz,
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+ 4700, /* tLOW = 4.7 us */
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+ scl_falling_time,
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+ 0); /* No offset */
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}
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}
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dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT);
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dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT);
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dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT);
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dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT);
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dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
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dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
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- /* Fast-mode */
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- hcnt = i2c_dw_scl_hcnt(input_clock_khz,
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- 600, /* tHD;STA = tHIGH = 0.6 us */
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- sda_falling_time,
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- 0, /* 0: DW default, 1: Ideal */
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- 0); /* No offset */
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- lcnt = i2c_dw_scl_lcnt(input_clock_khz,
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- 1300, /* tLOW = 1.3 us */
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- scl_falling_time,
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- 0); /* No offset */
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-
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+ /* Set SCL timing parameters for fast-mode */
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if (dev->fs_hcnt && dev->fs_lcnt) {
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if (dev->fs_hcnt && dev->fs_lcnt) {
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hcnt = dev->fs_hcnt;
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hcnt = dev->fs_hcnt;
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lcnt = dev->fs_lcnt;
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lcnt = dev->fs_lcnt;
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+ } else {
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+ hcnt = i2c_dw_scl_hcnt(input_clock_khz,
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+ 600, /* tHD;STA = tHIGH = 0.6 us */
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+ sda_falling_time,
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+ 0, /* 0: DW default, 1: Ideal */
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+ 0); /* No offset */
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+ lcnt = i2c_dw_scl_lcnt(input_clock_khz,
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+ 1300, /* tLOW = 1.3 us */
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+ scl_falling_time,
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+ 0); /* No offset */
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}
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}
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dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT);
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dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT);
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dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);
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dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);
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