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@@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
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+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@@ -70,23 +71,23 @@ MODULE_PARM_DESC(led_id,
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* On the PCI bus, there is one BAR (BAR0) of 2Mb size, exposing
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* AHB addresses starting from 0x880000
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*
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- * Internally, firmware uses addresses that allows faster access but
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+ * Internally, firmware uses addresses that allow faster access but
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* are invisible from the host. To read from these addresses, alternative
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* AHB address must be used.
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- *
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- * Memory mapping
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- * Linker address PCI/Host address
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- * 0x880000 .. 0xa80000 2Mb BAR0
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- * 0x800000 .. 0x807000 0x900000 .. 0x907000 28k DCCM
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- * 0x840000 .. 0x857000 0x908000 .. 0x91f000 92k PERIPH
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*/
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/**
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- * @fw_mapping provides memory remapping table
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+ * @sparrow_fw_mapping provides memory remapping table for sparrow
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*
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* array size should be in sync with the declaration in the wil6210.h
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+ *
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+ * Sparrow memory mapping:
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+ * Linker address PCI/Host address
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+ * 0x880000 .. 0xa80000 2Mb BAR0
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+ * 0x800000 .. 0x808000 0x900000 .. 0x908000 32k DCCM
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+ * 0x840000 .. 0x860000 0x908000 .. 0x928000 128k PERIPH
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*/
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-const struct fw_map fw_mapping[] = {
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+const struct fw_map sparrow_fw_mapping[] = {
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/* FW code RAM 256k */
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{0x000000, 0x040000, 0x8c0000, "fw_code", true},
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/* FW data RAM 32k */
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@@ -112,6 +113,51 @@ const struct fw_map fw_mapping[] = {
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{0x800000, 0x804000, 0x940000, "uc_data", false},
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};
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+/**
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+ * @talyn_fw_mapping provides memory remapping table for Talyn
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+ *
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+ * array size should be in sync with the declaration in the wil6210.h
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+ *
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+ * Talyn memory mapping:
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+ * Linker address PCI/Host address
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+ * 0x880000 .. 0xc80000 4Mb BAR0
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+ * 0x800000 .. 0x820000 0xa00000 .. 0xa20000 128k DCCM
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+ * 0x840000 .. 0x858000 0xa20000 .. 0xa38000 96k PERIPH
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+ */
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+const struct fw_map talyn_fw_mapping[] = {
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+ /* FW code RAM 1M */
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+ {0x000000, 0x100000, 0x900000, "fw_code", true},
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+ /* FW data RAM 128k */
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+ {0x800000, 0x820000, 0xa00000, "fw_data", true},
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+ /* periph. data RAM 96k */
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+ {0x840000, 0x858000, 0xa20000, "fw_peri", true},
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+ /* various RGF 40k */
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+ {0x880000, 0x88a000, 0x880000, "rgf", true},
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+ /* AGC table 4k */
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+ {0x88a000, 0x88b000, 0x88a000, "AGC_tbl", true},
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+ /* Pcie_ext_rgf 4k */
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+ {0x88b000, 0x88c000, 0x88b000, "rgf_ext", true},
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+ /* mac_ext_rgf 1344b */
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+ {0x88c000, 0x88c540, 0x88c000, "mac_rgf_ext", true},
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+ /* ext USER RGF 4k */
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+ {0x88d000, 0x88e000, 0x88d000, "ext_user_rgf", true},
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+ /* OTP 4k */
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+ {0x8a0000, 0x8a1000, 0x8a0000, "otp", true},
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+ /* DMA EXT RGF 64k */
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+ {0x8b0000, 0x8c0000, 0x8b0000, "dma_ext_rgf", true},
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+ /* upper area 1536k */
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+ {0x900000, 0xa80000, 0x900000, "upper", true},
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+ /* UCODE areas - accessible by debugfs blobs but not by
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+ * wmi_addr_remap. UCODE areas MUST be added AFTER FW areas!
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+ */
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+ /* ucode code RAM 256k */
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+ {0x000000, 0x040000, 0xa38000, "uc_code", false},
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+ /* ucode data RAM 32k */
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+ {0x800000, 0x808000, 0xa78000, "uc_data", false},
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+};
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+
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+struct fw_map fw_mapping[MAX_FW_MAPPING_TABLE_SIZE];
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+
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struct blink_on_off_time led_blink_time[] = {
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{WIL_LED_BLINK_ON_SLOW_MS, WIL_LED_BLINK_OFF_SLOW_MS},
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{WIL_LED_BLINK_ON_MED_MS, WIL_LED_BLINK_OFF_MED_MS},
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