|
@@ -14,6 +14,7 @@
|
|
#include <linux/init.h>
|
|
#include <linux/init.h>
|
|
#include <linux/string.h>
|
|
#include <linux/string.h>
|
|
#include <linux/kernel.h>
|
|
#include <linux/kernel.h>
|
|
|
|
+#include <linux/pci_regs.h>
|
|
#include <linux/serial_core.h>
|
|
#include <linux/serial_core.h>
|
|
|
|
|
|
#include <asm/cacheflush.h>
|
|
#include <asm/cacheflush.h>
|
|
@@ -242,23 +243,19 @@ mips_pci_controller:
|
|
MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
|
|
MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
|
|
MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
|
|
MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
|
|
#endif
|
|
#endif
|
|
-#ifndef CONFIG_EVA
|
|
|
|
- /* Fix up target memory mapping. */
|
|
|
|
- MSC_READ(MSC01_PCI_BAR0, mask);
|
|
|
|
- MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK);
|
|
|
|
-#else
|
|
|
|
|
|
+
|
|
/*
|
|
/*
|
|
* Setup the Malta max (2GB) memory for PCI DMA in host bridge
|
|
* Setup the Malta max (2GB) memory for PCI DMA in host bridge
|
|
- * in transparent addressing mode, starting from 0x80000000.
|
|
|
|
|
|
+ * in transparent addressing mode.
|
|
*/
|
|
*/
|
|
- mask = PHYS_OFFSET | (1<<3);
|
|
|
|
|
|
+ mask = PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_PREFETCH;
|
|
MSC_WRITE(MSC01_PCI_BAR0, mask);
|
|
MSC_WRITE(MSC01_PCI_BAR0, mask);
|
|
-
|
|
|
|
- mask = PHYS_OFFSET;
|
|
|
|
MSC_WRITE(MSC01_PCI_HEAD4, mask);
|
|
MSC_WRITE(MSC01_PCI_HEAD4, mask);
|
|
|
|
+
|
|
|
|
+ mask &= MSC01_PCI_BAR0_SIZE_MSK;
|
|
MSC_WRITE(MSC01_PCI_P2SCMSKL, mask);
|
|
MSC_WRITE(MSC01_PCI_P2SCMSKL, mask);
|
|
MSC_WRITE(MSC01_PCI_P2SCMAPL, mask);
|
|
MSC_WRITE(MSC01_PCI_P2SCMAPL, mask);
|
|
-#endif
|
|
|
|
|
|
+
|
|
/* Don't handle target retries indefinitely. */
|
|
/* Don't handle target retries indefinitely. */
|
|
if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
|
|
if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
|
|
MSC01_PCI_CFG_MAXRTRY_MSK)
|
|
MSC01_PCI_CFG_MAXRTRY_MSK)
|