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@@ -1054,38 +1054,8 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
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dev_err(bank->dev, "Could not get gpio dbck\n");
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}
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-static void
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-omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start,
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- unsigned int num)
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-{
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- struct irq_chip_generic *gc;
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- struct irq_chip_type *ct;
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-
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- gc = irq_alloc_generic_chip("MPUIO", 1, irq_start, bank->base,
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- handle_simple_irq);
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- if (!gc) {
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- dev_err(bank->dev, "Memory alloc failed for gc\n");
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- return;
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- }
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-
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- ct = gc->chip_types;
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-
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- /* NOTE: No ack required, reading IRQ status clears it. */
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- ct->chip.irq_mask = irq_gc_mask_set_bit;
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- ct->chip.irq_unmask = irq_gc_mask_clr_bit;
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- ct->chip.irq_set_type = omap_gpio_irq_type;
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-
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- if (bank->regs->wkup_en)
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- ct->chip.irq_set_wake = omap_gpio_wake_enable;
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-
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- ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride;
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- irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
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- IRQ_NOREQUEST | IRQ_NOPROBE, 0);
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-}
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-
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static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc)
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{
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- int j;
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static int gpio;
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int irq_base = 0;
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int ret;
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@@ -1132,6 +1102,15 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc)
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}
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#endif
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+ /* MPUIO is a bit different, reading IRQ status clears it */
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+ if (bank->is_mpuio) {
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+ irqc->irq_ack = dummy_irq_chip.irq_ack;
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+ irqc->irq_mask = irq_gc_mask_set_bit;
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+ irqc->irq_unmask = irq_gc_mask_clr_bit;
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+ if (!bank->regs->wkup_en)
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+ irqc->irq_set_wake = NULL;
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+ }
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+
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ret = gpiochip_irqchip_add(&bank->chip, irqc,
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irq_base, omap_gpio_irq_handler,
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IRQ_TYPE_NONE);
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@@ -1145,15 +1124,6 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc)
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gpiochip_set_chained_irqchip(&bank->chip, irqc,
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bank->irq, omap_gpio_irq_handler);
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- for (j = 0; j < bank->width; j++) {
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- int irq = irq_find_mapping(bank->chip.irqdomain, j);
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- if (bank->is_mpuio) {
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- omap_mpuio_alloc_gc(bank, irq, bank->width);
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- irq_set_chip_and_handler(irq, NULL, NULL);
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- set_irq_flags(irq, 0);
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- }
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- }
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-
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return 0;
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}
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