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@@ -637,8 +637,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
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}
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}
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- pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp);
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-
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if (pp->ops->host_init)
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pp->ops->host_init(pp);
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@@ -809,6 +807,11 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
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{
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u32 val;
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+ /* get iATU unroll support */
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+ pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp);
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+ dev_dbg(pp->dev, "iATU unroll: %s\n",
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+ pp->iatu_unroll_enabled ? "enabled" : "disabled");
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+
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/* set the number of lanes */
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val = dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL);
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val &= ~PORT_LINK_MODE_MASK;
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