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@@ -514,8 +514,8 @@ static int amdgpu_uvd_cs_msg(struct amdgpu_uvd_cs_ctx *ctx,
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struct amdgpu_device *adev = ctx->parser->adev;
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int32_t *msg, msg_type, handle;
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void *ptr;
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-
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- int i, r;
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+ long r;
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+ int i;
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if (offset & 0x3F) {
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DRM_ERROR("UVD messages must be 64 byte aligned!\n");
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@@ -524,14 +524,14 @@ static int amdgpu_uvd_cs_msg(struct amdgpu_uvd_cs_ctx *ctx,
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r = reservation_object_wait_timeout_rcu(bo->tbo.resv, true, false,
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MAX_SCHEDULE_TIMEOUT);
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- if (r) {
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- DRM_ERROR("Failed waiting for UVD message (%d)!\n", r);
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+ if (r < 0) {
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+ DRM_ERROR("Failed waiting for UVD message (%ld)!\n", r);
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return r;
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}
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r = amdgpu_bo_kmap(bo, &ptr);
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if (r) {
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- DRM_ERROR("Failed mapping the UVD message (%d)!\n", r);
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+ DRM_ERROR("Failed mapping the UVD message (%ld)!\n", r);
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return r;
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}
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