Эх сурвалжийг харах

arm64: elf: advertise 8.1 atomic instructions as new hwcap

The ARM v8.1 architecture introduces new atomic instructions to the A64
instruction set for things like cmpxchg, so advertise their availability
to userspace using a hwcap.

Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon 10 жил өмнө
parent
commit
40a1db2434

+ 1 - 0
arch/arm64/include/uapi/asm/hwcap.h

@@ -27,5 +27,6 @@
 #define HWCAP_SHA1		(1 << 5)
 #define HWCAP_SHA1		(1 << 5)
 #define HWCAP_SHA2		(1 << 6)
 #define HWCAP_SHA2		(1 << 6)
 #define HWCAP_CRC32		(1 << 7)
 #define HWCAP_CRC32		(1 << 7)
+#define HWCAP_ATOMICS		(1 << 8)
 
 
 #endif /* _UAPI__ASM_HWCAP_H */
 #endif /* _UAPI__ASM_HWCAP_H */

+ 14 - 0
arch/arm64/kernel/setup.c

@@ -278,6 +278,19 @@ static void __init setup_processor(void)
 	if (block && !(block & 0x8))
 	if (block && !(block & 0x8))
 		elf_hwcap |= HWCAP_CRC32;
 		elf_hwcap |= HWCAP_CRC32;
 
 
+	block = (features >> 20) & 0xf;
+	if (!(block & 0x8)) {
+		switch (block) {
+		default:
+		case 2:
+			elf_hwcap |= HWCAP_ATOMICS;
+		case 1:
+			/* RESERVED */
+		case 0:
+			break;
+		}
+	}
+
 #ifdef CONFIG_COMPAT
 #ifdef CONFIG_COMPAT
 	/*
 	/*
 	 * ID_ISAR5_EL1 carries similar information as above, but pertaining to
 	 * ID_ISAR5_EL1 carries similar information as above, but pertaining to
@@ -457,6 +470,7 @@ static const char *hwcap_str[] = {
 	"sha1",
 	"sha1",
 	"sha2",
 	"sha2",
 	"crc32",
 	"crc32",
+	"atomics",
 	NULL
 	NULL
 };
 };