|
@@ -1369,6 +1369,14 @@ static int g4x_reset_complete(struct drm_device *dev)
|
|
return (gdrst & GRDOM_RESET_ENABLE) == 0;
|
|
return (gdrst & GRDOM_RESET_ENABLE) == 0;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
+static int g33_do_reset(struct drm_device *dev)
|
|
|
|
+{
|
|
|
|
+ /* FIXME spec says to turn off all planes and wait 1 usec before reset */
|
|
|
|
+
|
|
|
|
+ pci_write_config_byte(dev->pdev, I915_GDRST, GRDOM_RESET_ENABLE);
|
|
|
|
+ return wait_for(g4x_reset_complete(dev), 500);
|
|
|
|
+}
|
|
|
|
+
|
|
static int g4x_do_reset(struct drm_device *dev)
|
|
static int g4x_do_reset(struct drm_device *dev)
|
|
{
|
|
{
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
@@ -1452,7 +1460,9 @@ int intel_gpu_reset(struct drm_device *dev)
|
|
return ironlake_do_reset(dev);
|
|
return ironlake_do_reset(dev);
|
|
else if (IS_G4X(dev))
|
|
else if (IS_G4X(dev))
|
|
return g4x_do_reset(dev);
|
|
return g4x_do_reset(dev);
|
|
- else if (IS_GEN4(dev) || (IS_GEN3(dev) && !IS_G33(dev)))
|
|
|
|
|
|
+ else if (IS_G33(dev))
|
|
|
|
+ return g33_do_reset(dev);
|
|
|
|
+ else if (INTEL_INFO(dev)->gen >= 3)
|
|
return i915_do_reset(dev);
|
|
return i915_do_reset(dev);
|
|
else
|
|
else
|
|
return -ENODEV;
|
|
return -ENODEV;
|