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+/*
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+ * Copyright(c) 2015 Intel Corporation. All rights reserved.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of version 2 of the GNU General Public License as
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+ * published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful, but
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+ * WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ * General Public License for more details.
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+ */
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+#ifndef __ASM_X86_PMEM_H__
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+#define __ASM_X86_PMEM_H__
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+
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+#include <linux/uaccess.h>
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+#include <asm/cacheflush.h>
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+#include <asm/cpufeature.h>
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+#include <asm/special_insns.h>
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+
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+#ifdef ARCH_HAS_NOCACHE_UACCESS
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+
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+/**
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+ * arch_memcpy_to_pmem - copy data to persistent memory
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+ * @dst: destination buffer for the copy
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+ * @src: source buffer for the copy
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+ * @n: length of the copy in bytes
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+ *
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+ * Copy data to persistent memory media via non-temporal stores so that
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+ * a subsequent arch_wmb_pmem() can flush cpu and memory controller
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+ * write buffers to guarantee durability.
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+ */
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+static inline void arch_memcpy_to_pmem(void __pmem *dst, const void *src,
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+ size_t n)
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+{
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+ int unwritten;
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+
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+ /*
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+ * We are copying between two kernel buffers, if
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+ * __copy_from_user_inatomic_nocache() returns an error (page
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+ * fault) we would have already reported a general protection fault
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+ * before the WARN+BUG.
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+ */
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+ unwritten = __copy_from_user_inatomic_nocache((void __force *) dst,
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+ (void __user *) src, n);
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+ if (WARN(unwritten, "%s: fault copying %p <- %p unwritten: %d\n",
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+ __func__, dst, src, unwritten))
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+ BUG();
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+}
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+
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+/**
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+ * arch_wmb_pmem - synchronize writes to persistent memory
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+ *
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+ * After a series of arch_memcpy_to_pmem() operations this drains data
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+ * from cpu write buffers and any platform (memory controller) buffers
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+ * to ensure that written data is durable on persistent memory media.
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+ */
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+static inline void arch_wmb_pmem(void)
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+{
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+ /*
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+ * wmb() to 'sfence' all previous writes such that they are
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+ * architecturally visible to 'pcommit'. Note, that we've
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+ * already arranged for pmem writes to avoid the cache via
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+ * arch_memcpy_to_pmem().
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+ */
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+ wmb();
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+ pcommit_sfence();
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+}
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+
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+static inline bool __arch_has_wmb_pmem(void)
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+{
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+#ifdef CONFIG_X86_64
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+ /*
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+ * We require that wmb() be an 'sfence', that is only guaranteed on
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+ * 64-bit builds
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+ */
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+ return static_cpu_has(X86_FEATURE_PCOMMIT);
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+#else
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+ return false;
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+#endif
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+}
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+#else /* ARCH_HAS_NOCACHE_UACCESS i.e. ARCH=um */
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+extern void arch_memcpy_to_pmem(void __pmem *dst, const void *src, size_t n);
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+extern void arch_wmb_pmem(void);
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+
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+static inline bool __arch_has_wmb_pmem(void)
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+{
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+ return false;
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+}
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+#endif
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+
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+#endif /* __ASM_X86_PMEM_H__ */
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Ross Zwisler