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@@ -0,0 +1,50 @@
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+* ARC EMAC 10/100 Ethernet platform driver for Rockchip Rk3066/RK3188 SoCs
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+
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+Required properties:
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+- compatible: Should be "rockchip,rk3066-emac" or "rockchip,rk3188-emac"
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+ according to the target SoC.
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+- reg: Address and length of the register set for the device
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+- interrupts: Should contain the EMAC interrupts
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+- rockchip,grf: phandle to the syscon grf used to control speed and mode
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+ for emac.
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+- phy: see ethernet.txt file in the same directory.
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+- phy-mode: see ethernet.txt file in the same directory.
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+
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+Optional properties:
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+- phy-supply: phandle to a regulator if the PHY needs one
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+
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+Clock handling:
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+- clocks: Must contain an entry for each entry in clock-names.
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+- clock-names: Shall be "hclk" for the host clock needed to calculate and set
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+ polling period of EMAC and "macref" for the reference clock needed to transfer
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+ data to and from the phy.
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+
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+Child nodes of the driver are the individual PHY devices connected to the
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+MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.
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+
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+Examples:
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+
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+ethernet@10204000 {
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+ compatible = "rockchip,rk3188-emac";
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+ reg = <0xc0fc2000 0x3c>;
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+ interrupts = <6>;
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+ mac-address = [ 00 11 22 33 44 55 ];
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+
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+ clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
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+ clock-names = "hclk", "macref";
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
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+
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+ rockchip,grf = <&grf>;
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+
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+ phy = <&phy0>;
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+ phy-mode = "rmii";
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+ phy-supply = <&vcc_rmii>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ phy0: ethernet-phy@0 {
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+ reg = <1>;
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+ };
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+};
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