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@@ -646,8 +646,8 @@ static void dce_v10_0_resume_mc_access(struct amdgpu_device *adev,
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if (save->crtc_enabled[i]) {
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tmp = RREG32(mmMASTER_UPDATE_MODE + crtc_offsets[i]);
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- if (REG_GET_FIELD(tmp, MASTER_UPDATE_MODE, MASTER_UPDATE_MODE) != 3) {
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- tmp = REG_SET_FIELD(tmp, MASTER_UPDATE_MODE, MASTER_UPDATE_MODE, 3);
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+ if (REG_GET_FIELD(tmp, MASTER_UPDATE_MODE, MASTER_UPDATE_MODE) != 0) {
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+ tmp = REG_SET_FIELD(tmp, MASTER_UPDATE_MODE, MASTER_UPDATE_MODE, 0);
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WREG32(mmMASTER_UPDATE_MODE + crtc_offsets[i], tmp);
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}
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tmp = RREG32(mmGRPH_UPDATE + crtc_offsets[i]);
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@@ -2314,8 +2314,8 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
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WREG32(mmVIEWPORT_SIZE + amdgpu_crtc->crtc_offset,
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(viewport_w << 16) | viewport_h);
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- /* set pageflip to happen only at start of vblank interval (front porch) */
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- WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 3);
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+ /* set pageflip to happen anywhere in vblank interval */
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+ WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);
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if (!atomic && fb && fb != crtc->primary->fb) {
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amdgpu_fb = to_amdgpu_framebuffer(fb);
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