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@@ -43,6 +43,10 @@
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#define RK3288_SOC_CON2_FLASH0 BIT(7)
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#define RK3288_SOC_CON2_FLASH0 BIT(7)
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#define RK3288_SOC_FLASH_SUPPLY_NUM 2
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#define RK3288_SOC_FLASH_SUPPLY_NUM 2
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+#define RK3368_SOC_CON15 0x43c
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+#define RK3368_SOC_CON15_FLASH0 BIT(14)
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+#define RK3368_SOC_FLASH_SUPPLY_NUM 2
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+
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struct rockchip_iodomain;
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struct rockchip_iodomain;
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/**
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/**
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@@ -158,6 +162,25 @@ static void rk3288_iodomain_init(struct rockchip_iodomain *iod)
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dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
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dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
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}
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}
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+static void rk3368_iodomain_init(struct rockchip_iodomain *iod)
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+{
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+ int ret;
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+ u32 val;
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+
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+ /* if no flash supply we should leave things alone */
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+ if (!iod->supplies[RK3368_SOC_FLASH_SUPPLY_NUM].reg)
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+ return;
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+
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+ /*
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+ * set flash0 iodomain to also use this framework
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+ * instead of a special gpio.
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+ */
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+ val = RK3368_SOC_CON15_FLASH0 | (RK3368_SOC_CON15_FLASH0 << 16);
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+ ret = regmap_write(iod->grf, RK3368_SOC_CON15, val);
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+ if (ret < 0)
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+ dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
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+}
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+
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/*
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/*
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* On the rk3188 the io-domains are handled by a shared register with the
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* On the rk3188 the io-domains are handled by a shared register with the
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* lower 8 bits being still being continuing drive-strength settings.
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* lower 8 bits being still being continuing drive-strength settings.
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@@ -201,6 +224,34 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3288 = {
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.init = rk3288_iodomain_init,
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.init = rk3288_iodomain_init,
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};
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};
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+static const struct rockchip_iodomain_soc_data soc_data_rk3368 = {
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+ .grf_offset = 0x900,
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+ .supply_names = {
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+ NULL, /* reserved */
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+ "dvp", /* DVPIO_VDD */
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+ "flash0", /* FLASH0_VDD (emmc) */
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+ "wifi", /* APIO2_VDD (sdio0) */
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+ NULL,
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+ "audio", /* APIO3_VDD */
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+ "sdcard", /* SDMMC0_VDD (sdmmc) */
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+ "gpio30", /* APIO1_VDD */
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+ "gpio1830", /* APIO4_VDD (gpujtag) */
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+ },
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+ .init = rk3368_iodomain_init,
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+};
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+
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+static const struct rockchip_iodomain_soc_data soc_data_rk3368_pmu = {
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+ .grf_offset = 0x100,
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+ .supply_names = {
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+ NULL,
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+ NULL,
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+ NULL,
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+ NULL,
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+ "pmu", /*PMU IO domain*/
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+ "vop", /*LCDC IO domain*/
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+ },
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+};
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+
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static const struct of_device_id rockchip_iodomain_match[] = {
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static const struct of_device_id rockchip_iodomain_match[] = {
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{
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{
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.compatible = "rockchip,rk3188-io-voltage-domain",
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.compatible = "rockchip,rk3188-io-voltage-domain",
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@@ -210,6 +261,14 @@ static const struct of_device_id rockchip_iodomain_match[] = {
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.compatible = "rockchip,rk3288-io-voltage-domain",
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.compatible = "rockchip,rk3288-io-voltage-domain",
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.data = (void *)&soc_data_rk3288
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.data = (void *)&soc_data_rk3288
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},
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},
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+ {
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+ .compatible = "rockchip,rk3368-io-voltage-domain",
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+ .data = (void *)&soc_data_rk3368
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+ },
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+ {
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+ .compatible = "rockchip,rk3368-pmu-io-voltage-domain",
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+ .data = (void *)&soc_data_rk3368_pmu
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+ },
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{ /* sentinel */ },
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{ /* sentinel */ },
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};
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};
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