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@@ -7418,9 +7418,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
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return dpll | DPLL_VCO_ENABLE;
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}
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-static int ironlake_crtc_mode_set(struct intel_crtc *crtc,
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- int x, int y,
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- struct drm_framebuffer *fb)
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+static int ironlake_crtc_compute_clock(struct intel_crtc *crtc)
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{
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struct drm_device *dev = crtc->base.dev;
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intel_clock_t clock, reduced_clock;
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@@ -7466,17 +7464,13 @@ static int ironlake_crtc_mode_set(struct intel_crtc *crtc,
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else
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crtc->new_config->dpll_hw_state.fp1 = fp;
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- if (intel_crtc_to_shared_dpll(crtc))
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- intel_put_shared_dpll(crtc);
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-
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pll = intel_get_shared_dpll(crtc);
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if (pll == NULL) {
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DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
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pipe_name(crtc->pipe));
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return -EINVAL;
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}
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- } else
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- intel_put_shared_dpll(crtc);
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+ }
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if (is_lvds && has_reduced_clock && i915.powersave)
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crtc->lowfreq_avail = true;
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@@ -12480,7 +12474,8 @@ static void intel_init_display(struct drm_device *dev)
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} else if (HAS_PCH_SPLIT(dev)) {
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dev_priv->display.get_pipe_config = ironlake_get_pipe_config;
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dev_priv->display.get_plane_config = ironlake_get_plane_config;
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- dev_priv->display.crtc_mode_set = ironlake_crtc_mode_set;
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+ dev_priv->display.crtc_compute_clock =
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+ ironlake_crtc_compute_clock;
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dev_priv->display.crtc_enable = ironlake_crtc_enable;
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dev_priv->display.crtc_disable = ironlake_crtc_disable;
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dev_priv->display.off = ironlake_crtc_off;
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