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@@ -101,7 +101,8 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
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* - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it
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* - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it
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* - Disable pll2_pfd2_396m_clk
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* - Disable pll2_pfd2_396m_clk
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*/
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*/
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- if (of_machine_is_compatible("fsl,imx6ul")) {
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+ if (of_machine_is_compatible("fsl,imx6ul") ||
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+ of_machine_is_compatible("fsl,imx6ull")) {
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/*
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/*
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* When changing pll1_sw_clk's parent to pll1_sys_clk,
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* When changing pll1_sw_clk's parent to pll1_sys_clk,
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* CPU may run at higher than 528MHz, this will lead to
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* CPU may run at higher than 528MHz, this will lead to
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@@ -215,7 +216,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
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goto put_clk;
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goto put_clk;
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}
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}
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- if (of_machine_is_compatible("fsl,imx6ul")) {
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+ if (of_machine_is_compatible("fsl,imx6ul") ||
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+ of_machine_is_compatible("fsl,imx6ull")) {
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pll2_bus_clk = clk_get(cpu_dev, "pll2_bus");
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pll2_bus_clk = clk_get(cpu_dev, "pll2_bus");
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secondary_sel_clk = clk_get(cpu_dev, "secondary_sel");
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secondary_sel_clk = clk_get(cpu_dev, "secondary_sel");
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if (IS_ERR(pll2_bus_clk) || IS_ERR(secondary_sel_clk)) {
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if (IS_ERR(pll2_bus_clk) || IS_ERR(secondary_sel_clk)) {
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