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@@ -52,6 +52,10 @@
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#define CPCAP_BIT_RAND0 BIT(1) /* Set with CAL_MODE */
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#define CPCAP_BIT_ADEN BIT(0) /* Currently unused */
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+#define CPCAP_REG_ADCC1_DEFAULTS (CPCAP_BIT_ADEN_AUTO_CLR | \
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+ CPCAP_BIT_ADC_CLK_SEL0 | \
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+ CPCAP_BIT_RAND1)
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+
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/* Register CPCAP_REG_ADCC2 bits */
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#define CPCAP_BIT_CAL_FACTOR_ENABLE BIT(15) /* Currently unused */
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#define CPCAP_BIT_BATDETB_EN BIT(14) /* Currently unused */
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@@ -62,7 +66,7 @@
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#define CPCAP_BIT_ADC_PS_FACTOR0 BIT(9)
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#define CPCAP_BIT_AD4_SELECT BIT(8) /* Currently unused */
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#define CPCAP_BIT_ADC_BUSY BIT(7) /* Currently unused */
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-#define CPCAP_BIT_THERMBIAS_EN BIT(6) /* Currently unused */
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+#define CPCAP_BIT_THERMBIAS_EN BIT(6) /* Bias for AD0_BATTDETB */
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#define CPCAP_BIT_ADTRIG_DIS BIT(5) /* Disable interrupt */
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#define CPCAP_BIT_LIADC BIT(4) /* Currently unused */
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#define CPCAP_BIT_TS_REFEN BIT(3) /* Currently unused */
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@@ -70,6 +74,12 @@
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#define CPCAP_BIT_TS_M1 BIT(1) /* Currently unused */
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#define CPCAP_BIT_TS_M0 BIT(0) /* Currently unused */
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+#define CPCAP_REG_ADCC2_DEFAULTS (CPCAP_BIT_AD4_SELECT | \
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+ CPCAP_BIT_ADTRIG_DIS | \
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+ CPCAP_BIT_LIADC | \
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+ CPCAP_BIT_TS_M2 | \
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+ CPCAP_BIT_TS_M1)
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+
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#define CPCAP_MAX_TEMP_LVL 27
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#define CPCAP_FOUR_POINT_TWO_ADC 801
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#define ST_ADC_CAL_CHRGI_HIGH_THRESHOLD 530
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@@ -124,10 +134,10 @@ struct cpcap_adc {
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*/
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enum cpcap_adc_channel {
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/* Bank0 channels */
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- CPCAP_ADC_AD0_BATTDETB, /* Battery detection */
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+ CPCAP_ADC_AD0, /* Battery temperature */
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CPCAP_ADC_BATTP, /* Battery voltage */
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CPCAP_ADC_VBUS, /* USB VBUS voltage */
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- CPCAP_ADC_AD3, /* Battery temperature when charging */
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+ CPCAP_ADC_AD3, /* Die temperature when charging */
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CPCAP_ADC_BPLUS_AD4, /* Another battery or system voltage */
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CPCAP_ADC_CHG_ISENSE, /* Calibrated charge current */
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CPCAP_ADC_BATTI, /* Calibrated system current */
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@@ -217,7 +227,7 @@ struct cpcap_adc_request {
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/* Phasing table for channels. Note that channels 16 & 17 use BATTP and BATTI */
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static const struct cpcap_adc_phasing_tbl bank_phasing[] = {
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/* Bank0 */
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- [CPCAP_ADC_AD0_BATTDETB] = {0, 0x80, 0x80, 0, 1023},
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+ [CPCAP_ADC_AD0] = {0, 0x80, 0x80, 0, 1023},
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[CPCAP_ADC_BATTP] = {0, 0x80, 0x80, 0, 1023},
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[CPCAP_ADC_VBUS] = {0, 0x80, 0x80, 0, 1023},
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[CPCAP_ADC_AD3] = {0, 0x80, 0x80, 0, 1023},
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@@ -243,7 +253,7 @@ static const struct cpcap_adc_phasing_tbl bank_phasing[] = {
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*/
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static struct cpcap_adc_conversion_tbl bank_conversion[] = {
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/* Bank0 */
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- [CPCAP_ADC_AD0_BATTDETB] = {
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+ [CPCAP_ADC_AD0] = {
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IIO_CHAN_INFO_PROCESSED, 0, 0, 0, 1, 1,
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},
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[CPCAP_ADC_BATTP] = {
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@@ -541,6 +551,15 @@ static void cpcap_adc_setup_bank(struct cpcap_adc *ddata,
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return;
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switch (req->channel) {
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+ case CPCAP_ADC_AD0:
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+ value2 |= CPCAP_BIT_THERMBIAS_EN;
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+ error = regmap_update_bits(ddata->reg, CPCAP_REG_ADCC2,
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+ CPCAP_BIT_THERMBIAS_EN,
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+ value2);
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+ if (error)
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+ return;
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+ usleep_range(800, 1000);
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+ break;
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case CPCAP_ADC_AD8 ... CPCAP_ADC_TSY2_AD15:
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value1 |= CPCAP_BIT_AD_SEL1;
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break;
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@@ -583,7 +602,8 @@ static void cpcap_adc_setup_bank(struct cpcap_adc *ddata,
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error = regmap_update_bits(ddata->reg, CPCAP_REG_ADCC2,
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CPCAP_BIT_ATOX_PS_FACTOR |
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CPCAP_BIT_ADC_PS_FACTOR1 |
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- CPCAP_BIT_ADC_PS_FACTOR0,
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+ CPCAP_BIT_ADC_PS_FACTOR0 |
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+ CPCAP_BIT_THERMBIAS_EN,
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value2);
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if (error)
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return;
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@@ -664,6 +684,21 @@ static int cpcap_adc_start_bank(struct cpcap_adc *ddata,
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return error;
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}
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+static int cpcap_adc_stop_bank(struct cpcap_adc *ddata)
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+{
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+ int error;
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+
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+ error = regmap_update_bits(ddata->reg, CPCAP_REG_ADCC1,
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+ 0xffff,
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+ CPCAP_REG_ADCC1_DEFAULTS);
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+ if (error)
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+ return error;
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+
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+ return regmap_update_bits(ddata->reg, CPCAP_REG_ADCC2,
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+ 0xffff,
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+ CPCAP_REG_ADCC2_DEFAULTS);
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+}
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+
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static void cpcap_adc_phase(struct cpcap_adc_request *req)
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{
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const struct cpcap_adc_conversion_tbl *conv_tbl = req->conv_tbl;
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@@ -758,7 +793,7 @@ static void cpcap_adc_convert(struct cpcap_adc_request *req)
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return;
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/* Temperatures use a lookup table instead of conversion table */
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- if ((req->channel == CPCAP_ADC_AD0_BATTDETB) ||
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+ if ((req->channel == CPCAP_ADC_AD0) ||
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(req->channel == CPCAP_ADC_AD3)) {
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req->result =
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cpcap_adc_table_to_millicelcius(req->result);
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@@ -820,7 +855,7 @@ static int cpcap_adc_init_request(struct cpcap_adc_request *req,
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req->conv_tbl = bank_conversion;
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switch (channel) {
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- case CPCAP_ADC_AD0_BATTDETB ... CPCAP_ADC_USB_ID:
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+ case CPCAP_ADC_AD0 ... CPCAP_ADC_USB_ID:
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req->bank_index = channel;
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break;
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case CPCAP_ADC_AD8 ... CPCAP_ADC_TSY2_AD15:
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@@ -858,6 +893,9 @@ static int cpcap_adc_read(struct iio_dev *indio_dev,
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if (error)
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goto err_unlock;
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error = regmap_read(ddata->reg, chan->address, val);
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+ if (error)
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+ goto err_unlock;
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+ error = cpcap_adc_stop_bank(ddata);
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if (error)
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goto err_unlock;
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mutex_unlock(&ddata->lock);
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@@ -868,6 +906,9 @@ static int cpcap_adc_read(struct iio_dev *indio_dev,
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if (error)
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goto err_unlock;
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error = cpcap_adc_read_bank_scaled(ddata, &req);
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+ if (error)
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+ goto err_unlock;
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+ error = cpcap_adc_stop_bank(ddata);
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if (error)
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goto err_unlock;
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mutex_unlock(&ddata->lock);
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