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@@ -137,6 +137,42 @@ For 32-bit we have the following conventions - kernel is built with
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UNWIND_HINT_REGS offset=\offset
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.endm
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+ .macro PUSH_AND_CLEAR_REGS
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+ /*
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+ * Push registers and sanitize registers of values that a
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+ * speculation attack might otherwise want to exploit. The
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+ * lower registers are likely clobbered well before they
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+ * could be put to use in a speculative execution gadget.
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+ * Interleave XOR with PUSH for better uop scheduling:
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+ */
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+ pushq %rdi /* pt_regs->di */
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+ pushq %rsi /* pt_regs->si */
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+ pushq %rdx /* pt_regs->dx */
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+ pushq %rcx /* pt_regs->cx */
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+ pushq %rax /* pt_regs->ax */
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+ pushq %r8 /* pt_regs->r8 */
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+ xorq %r8, %r8 /* nospec r8 */
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+ pushq %r9 /* pt_regs->r9 */
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+ xorq %r9, %r9 /* nospec r9 */
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+ pushq %r10 /* pt_regs->r10 */
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+ xorq %r10, %r10 /* nospec r10 */
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+ pushq %r11 /* pt_regs->r11 */
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+ xorq %r11, %r11 /* nospec r11*/
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+ pushq %rbx /* pt_regs->rbx */
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+ xorl %ebx, %ebx /* nospec rbx*/
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+ pushq %rbp /* pt_regs->rbp */
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+ xorl %ebp, %ebp /* nospec rbp*/
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+ pushq %r12 /* pt_regs->r12 */
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+ xorq %r12, %r12 /* nospec r12*/
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+ pushq %r13 /* pt_regs->r13 */
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+ xorq %r13, %r13 /* nospec r13*/
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+ pushq %r14 /* pt_regs->r14 */
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+ xorq %r14, %r14 /* nospec r14*/
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+ pushq %r15 /* pt_regs->r15 */
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+ xorq %r15, %r15 /* nospec r15*/
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+ UNWIND_HINT_REGS
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+ .endm
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+
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.macro POP_REGS pop_rdi=1 skip_r11rcx=0
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popq %r15
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popq %r14
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