|
@@ -12,6 +12,33 @@
|
|
#include <asm/percpu.h>
|
|
#include <asm/percpu.h>
|
|
#include <asm/types.h>
|
|
#include <asm/types.h>
|
|
|
|
|
|
|
|
+/*
|
|
|
|
+ * TOP_OF_KERNEL_STACK_PADDING is a number of unused bytes that we
|
|
|
|
+ * reserve at the top of the kernel stack. We do it because of a nasty
|
|
|
|
+ * 32-bit corner case. On x86_32, the hardware stack frame is
|
|
|
|
+ * variable-length. Except for vm86 mode, struct pt_regs assumes a
|
|
|
|
+ * maximum-length frame. If we enter from CPL 0, the top 8 bytes of
|
|
|
|
+ * pt_regs don't actually exist. Ordinarily this doesn't matter, but it
|
|
|
|
+ * does in at least one case:
|
|
|
|
+ *
|
|
|
|
+ * If we take an NMI early enough in SYSENTER, then we can end up with
|
|
|
|
+ * pt_regs that extends above sp0. On the way out, in the espfix code,
|
|
|
|
+ * we can read the saved SS value, but that value will be above sp0.
|
|
|
|
+ * Without this offset, that can result in a page fault. (We are
|
|
|
|
+ * careful that, in this case, the value we read doesn't matter.)
|
|
|
|
+ *
|
|
|
|
+ * In vm86 mode, the hardware frame is much longer still, but we neither
|
|
|
|
+ * access the extra members from NMI context, nor do we write such a
|
|
|
|
+ * frame at sp0 at all.
|
|
|
|
+ *
|
|
|
|
+ * x86_64 has a fixed-length stack frame.
|
|
|
|
+ */
|
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
|
+# define TOP_OF_KERNEL_STACK_PADDING 8
|
|
|
|
+#else
|
|
|
|
+# define TOP_OF_KERNEL_STACK_PADDING 0
|
|
|
|
+#endif
|
|
|
|
+
|
|
/*
|
|
/*
|
|
* low level task data that entry.S needs immediate access to
|
|
* low level task data that entry.S needs immediate access to
|
|
* - this struct should fit entirely inside of one cache line
|
|
* - this struct should fit entirely inside of one cache line
|