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@@ -41,6 +41,7 @@ static const struct kfd_device_info kaveri_device_info = {
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.num_of_watch_points = 4,
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.num_of_watch_points = 4,
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.mqd_size_aligned = MQD_SIZE_ALIGNED,
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.mqd_size_aligned = MQD_SIZE_ALIGNED,
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.supports_cwsr = false,
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.supports_cwsr = false,
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+ .needs_pci_atomics = false,
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};
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};
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static const struct kfd_device_info carrizo_device_info = {
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static const struct kfd_device_info carrizo_device_info = {
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@@ -53,6 +54,7 @@ static const struct kfd_device_info carrizo_device_info = {
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.num_of_watch_points = 4,
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.num_of_watch_points = 4,
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.mqd_size_aligned = MQD_SIZE_ALIGNED,
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.mqd_size_aligned = MQD_SIZE_ALIGNED,
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.supports_cwsr = true,
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.supports_cwsr = true,
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+ .needs_pci_atomics = false,
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};
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};
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struct kfd_deviceid {
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struct kfd_deviceid {
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@@ -127,6 +129,21 @@ struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd,
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return NULL;
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return NULL;
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}
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}
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+ if (device_info->needs_pci_atomics) {
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+ /* Allow BIF to recode atomics to PCIe 3.0
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+ * AtomicOps. 32 and 64-bit requests are possible and
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+ * must be supported.
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+ */
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+ if (pci_enable_atomic_ops_to_root(pdev,
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+ PCI_EXP_DEVCAP2_ATOMIC_COMP32 |
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+ PCI_EXP_DEVCAP2_ATOMIC_COMP64) < 0) {
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+ dev_info(kfd_device,
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+ "skipped device %x:%x, PCI rejects atomics",
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+ pdev->vendor, pdev->device);
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+ return NULL;
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+ }
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+ }
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+
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kfd = kzalloc(sizeof(*kfd), GFP_KERNEL);
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kfd = kzalloc(sizeof(*kfd), GFP_KERNEL);
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if (!kfd)
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if (!kfd)
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return NULL;
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return NULL;
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