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perf/x86: Enable Intel Cedarview Atom suppport

This patch enables perf_events support for Intel Cedarview
Atom (model 54) processors. Support includes PEBS and LBR.
Tested on my Atom N2600 netbook.

Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/20120820092421.GA11284@quad
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Stephane Eranian 13 年之前
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共有 2 个文件被更改,包括 3 次插入1 次删除
  1. 1 0
      arch/x86/kernel/cpu/perf_event_intel.c
  2. 2 1
      arch/x86/kernel/cpu/perf_event_intel_lbr.c

+ 1 - 0
arch/x86/kernel/cpu/perf_event_intel.c

@@ -2008,6 +2008,7 @@ __init int intel_pmu_init(void)
 		break;
 		break;
 
 
 	case 28: /* Atom */
 	case 28: /* Atom */
+	case 54: /* Cedariew */
 		memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
 		memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
 		       sizeof(hw_cache_event_ids));
 		       sizeof(hw_cache_event_ids));
 
 

+ 2 - 1
arch/x86/kernel/cpu/perf_event_intel_lbr.c

@@ -686,7 +686,8 @@ void intel_pmu_lbr_init_atom(void)
 	 * to have an operational LBR which can freeze
 	 * to have an operational LBR which can freeze
 	 * on PMU interrupt
 	 * on PMU interrupt
 	 */
 	 */
-	if (boot_cpu_data.x86_mask < 10) {
+	if (boot_cpu_data.x86_model == 28
+	    && boot_cpu_data.x86_mask < 10) {
 		pr_cont("LBR disabled due to erratum");
 		pr_cont("LBR disabled due to erratum");
 		return;
 		return;
 	}
 	}