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@@ -280,10 +280,13 @@ gk104_fifo_recover_chan(struct nvkm_fifo *base, int chid)
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static void
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gk104_fifo_recover_engn(struct gk104_fifo *fifo, int engn)
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{
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+ struct nvkm_engine *engine = fifo->engine[engn].engine;
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struct nvkm_subdev *subdev = &fifo->base.engine.subdev;
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+ struct nvkm_device *device = subdev->device;
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const u32 runl = fifo->engine[engn].runl;
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const u32 engm = BIT(engn);
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struct gk104_fifo_engine_status status;
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+ int mmui = -1;
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assert_spin_locked(&fifo->base.lock);
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if (fifo->recover.engm & engm)
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@@ -300,6 +303,44 @@ gk104_fifo_recover_engn(struct gk104_fifo *fifo, int engn)
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gk104_fifo_recover_chan(&fifo->base, status.chan->id);
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}
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+ /* Determine MMU fault ID for the engine, if we're not being
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+ * called from the fault handler already.
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+ */
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+ if (!status.faulted && engine) {
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+ mmui = nvkm_top_fault_id(device, engine->subdev.index);
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+ if (mmui < 0) {
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+ const struct nvkm_enum *en = fifo->func->fault.engine;
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+ for (; en && en->name; en++) {
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+ if (en->data2 == engine->subdev.index) {
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+ mmui = en->value;
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+ break;
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+ }
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+ }
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+ }
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+ WARN_ON(mmui < 0);
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+ }
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+
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+ /* Trigger a MMU fault for the engine.
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+ *
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+ * No good idea why this is needed, but nvgpu does something similar,
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+ * and it makes recovery from CTXSW_TIMEOUT a lot more reliable.
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+ */
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+ if (mmui >= 0) {
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+ nvkm_wr32(device, 0x002a30 + (engn * 0x04), 0x00000100 | mmui);
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+
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+ /* Wait for fault to trigger. */
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+ nvkm_msec(device, 2000,
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+ gk104_fifo_engine_status(fifo, engn, &status);
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+ if (status.faulted)
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+ break;
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+ );
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+
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+ /* Release MMU fault trigger, and ACK the fault. */
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+ nvkm_wr32(device, 0x002a30 + (engn * 0x04), 0x00000000);
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+ nvkm_wr32(device, 0x00259c, BIT(mmui));
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+ nvkm_wr32(device, 0x002100, 0x10000000);
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+ }
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+
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/* Schedule recovery. */
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nvkm_warn(subdev, "engine %d: scheduled for recovery\n", engn);
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schedule_work(&fifo->recover.work);
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