|
@@ -461,16 +461,15 @@
|
|
|
mstp1_clks: mstp1_clks@e6150134 {
|
|
|
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
|
|
|
reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
|
|
|
- clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
|
|
|
- <&cp_clk>,
|
|
|
- <&zs_clk>, <&zs_clk>, <&zs_clk>;
|
|
|
+ clocks = <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
|
|
|
+ <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
|
|
|
#clock-cells = <1>;
|
|
|
renesas,clock-indices = <
|
|
|
- R8A7794_CLK_TMU1 R8A7794_CLK_TMU3 R8A7794_CLK_TMU2
|
|
|
- R8A7794_CLK_CMT0 R8A7794_CLK_TMU0
|
|
|
+ R8A7794_CLK_TMU1 R8A7794_CLK_3DG R8A7794_CLK_TMU3
|
|
|
+ R8A7794_CLK_TMU2 R8A7794_CLK_CMT0 R8A7794_CLK_TMU0
|
|
|
>;
|
|
|
clock-output-names =
|
|
|
- "tmu1", "tmu3", "tmu2", "cmt0", "tmu0";
|
|
|
+ "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0";
|
|
|
};
|
|
|
mstp2_clks: mstp2_clks@e6150138 {
|
|
|
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
|