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@@ -196,6 +196,42 @@ int amdgpu_vcn_resume(struct amdgpu_device *adev)
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return 0;
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}
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+static void amdgpu_vcn_idle_work_handler(struct work_struct *work)
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+{
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+ struct amdgpu_device *adev =
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+ container_of(work, struct amdgpu_device, vcn.idle_work.work);
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+ unsigned fences = amdgpu_fence_count_emitted(&adev->vcn.ring_dec);
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+
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+ if (fences == 0) {
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+ if (adev->pm.dpm_enabled) {
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+ amdgpu_dpm_enable_uvd(adev, false);
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+ } else {
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+ amdgpu_asic_set_uvd_clocks(adev, 0, 0);
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+ }
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+ } else {
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+ schedule_delayed_work(&adev->vcn.idle_work, VCN_IDLE_TIMEOUT);
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+ }
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+}
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+
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+void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
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+{
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+ struct amdgpu_device *adev = ring->adev;
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+ bool set_clocks = !cancel_delayed_work_sync(&adev->vcn.idle_work);
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+
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+ if (set_clocks) {
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+ if (adev->pm.dpm_enabled) {
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+ amdgpu_dpm_enable_uvd(adev, true);
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+ } else {
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+ amdgpu_asic_set_uvd_clocks(adev, 53300, 40000);
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+ }
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+ }
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+}
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+
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+void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring)
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+{
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+ schedule_delayed_work(&ring->adev->vcn.idle_work, VCN_IDLE_TIMEOUT);
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+}
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+
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static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
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bool direct, struct dma_fence **fence)
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{
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@@ -365,42 +401,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
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return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence);
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}
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-static void amdgpu_vcn_idle_work_handler(struct work_struct *work)
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-{
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- struct amdgpu_device *adev =
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- container_of(work, struct amdgpu_device, vcn.idle_work.work);
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- unsigned fences = amdgpu_fence_count_emitted(&adev->vcn.ring_dec);
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-
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- if (fences == 0) {
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- if (adev->pm.dpm_enabled) {
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- amdgpu_dpm_enable_uvd(adev, false);
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- } else {
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- amdgpu_asic_set_uvd_clocks(adev, 0, 0);
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- }
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- } else {
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- schedule_delayed_work(&adev->vcn.idle_work, VCN_IDLE_TIMEOUT);
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- }
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-}
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-
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-void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
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-{
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- struct amdgpu_device *adev = ring->adev;
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- bool set_clocks = !cancel_delayed_work_sync(&adev->vcn.idle_work);
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-
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- if (set_clocks) {
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- if (adev->pm.dpm_enabled) {
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- amdgpu_dpm_enable_uvd(adev, true);
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- } else {
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- amdgpu_asic_set_uvd_clocks(adev, 53300, 40000);
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- }
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- }
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-}
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-
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-void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring)
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-{
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- schedule_delayed_work(&ring->adev->vcn.idle_work, VCN_IDLE_TIMEOUT);
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-}
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-
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int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
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{
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struct dma_fence *fence;
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@@ -435,6 +435,40 @@ error:
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return r;
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}
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+int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring)
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+{
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+ struct amdgpu_device *adev = ring->adev;
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+ uint32_t rptr = amdgpu_ring_get_rptr(ring);
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+ unsigned i;
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+ int r;
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+
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+ r = amdgpu_ring_alloc(ring, 16);
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+ if (r) {
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+ DRM_ERROR("amdgpu: vcn enc failed to lock ring %d (%d).\n",
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+ ring->idx, r);
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+ return r;
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+ }
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+ amdgpu_ring_write(ring, VCE_CMD_END);
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+ amdgpu_ring_commit(ring);
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+
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+ for (i = 0; i < adev->usec_timeout; i++) {
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+ if (amdgpu_ring_get_rptr(ring) != rptr)
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+ break;
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+ DRM_UDELAY(1);
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+ }
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+
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+ if (i < adev->usec_timeout) {
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+ DRM_INFO("ring test on %d succeeded in %d usecs\n",
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+ ring->idx, i);
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+ } else {
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+ DRM_ERROR("amdgpu: ring %d test failed\n",
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+ ring->idx);
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+ r = -ETIMEDOUT;
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+ }
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+
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+ return r;
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+}
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+
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static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
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struct dma_fence **fence)
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{
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@@ -561,40 +595,6 @@ err:
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return r;
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}
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-int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring)
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-{
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- struct amdgpu_device *adev = ring->adev;
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- uint32_t rptr = amdgpu_ring_get_rptr(ring);
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- unsigned i;
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- int r;
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-
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- r = amdgpu_ring_alloc(ring, 16);
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- if (r) {
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- DRM_ERROR("amdgpu: vcn enc failed to lock ring %d (%d).\n",
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- ring->idx, r);
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- return r;
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- }
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- amdgpu_ring_write(ring, VCE_CMD_END);
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- amdgpu_ring_commit(ring);
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-
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- for (i = 0; i < adev->usec_timeout; i++) {
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- if (amdgpu_ring_get_rptr(ring) != rptr)
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- break;
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- DRM_UDELAY(1);
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- }
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-
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- if (i < adev->usec_timeout) {
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- DRM_INFO("ring test on %d succeeded in %d usecs\n",
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- ring->idx, i);
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- } else {
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- DRM_ERROR("amdgpu: ring %d test failed\n",
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- ring->idx);
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- r = -ETIMEDOUT;
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- }
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-
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- return r;
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-}
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-
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int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
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{
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struct dma_fence *fence = NULL;
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