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@@ -0,0 +1,615 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright (C) 2017 Hisilicon Limited, All Rights Reserved.
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+ * Author: Zhichang Yuan <yuanzhichang@hisilicon.com>
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+ * Author: Zou Rongrong <zourongrong@huawei.com>
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+ * Author: John Garry <john.garry@huawei.com>
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+ */
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+
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+#include <linux/acpi.h>
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+#include <linux/console.h>
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+#include <linux/delay.h>
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+#include <linux/io.h>
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+#include <linux/logic_pio.h>
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+#include <linux/mfd/core.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/of_address.h>
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+#include <linux/of_platform.h>
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+#include <linux/pci.h>
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+#include <linux/slab.h>
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+
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+#define DRV_NAME "hisi-lpc"
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+
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+/*
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+ * Setting this bit means each IO operation will target a different port
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+ * address; 0 means repeated IO operations will use the same port,
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+ * such as BT.
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+ */
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+#define FG_INCRADDR_LPC 0x02
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+
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+struct lpc_cycle_para {
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+ unsigned int opflags;
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+ unsigned int csize; /* data length of each operation */
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+};
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+
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+struct hisi_lpc_dev {
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+ spinlock_t cycle_lock;
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+ void __iomem *membase;
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+ struct logic_pio_hwaddr *io_host;
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+};
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+
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+/* The max IO cycle counts supported is four per operation at maximum */
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+#define LPC_MAX_DWIDTH 4
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+
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+#define LPC_REG_STARTUP_SIGNAL 0x00
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+#define LPC_REG_STARTUP_SIGNAL_START BIT(0)
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+#define LPC_REG_OP_STATUS 0x04
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+#define LPC_REG_OP_STATUS_IDLE BIT(0)
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+#define LPC_REG_OP_STATUS_FINISHED BIT(1)
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+#define LPC_REG_OP_LEN 0x10 /* LPC cycles count per start */
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+#define LPC_REG_CMD 0x14
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+#define LPC_REG_CMD_OP BIT(0) /* 0: read, 1: write */
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+#define LPC_REG_CMD_SAMEADDR BIT(3)
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+#define LPC_REG_ADDR 0x20 /* target address */
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+#define LPC_REG_WDATA 0x24 /* write FIFO */
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+#define LPC_REG_RDATA 0x28 /* read FIFO */
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+
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+/* The minimal nanosecond interval for each query on LPC cycle status */
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+#define LPC_NSEC_PERWAIT 100
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+
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+/*
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+ * The maximum waiting time is about 128us. It is specific for stream I/O,
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+ * such as ins.
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+ *
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+ * The fastest IO cycle time is about 390ns, but the worst case will wait
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+ * for extra 256 lpc clocks, so (256 + 13) * 30ns = 8 us. The maximum burst
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+ * cycles is 16. So, the maximum waiting time is about 128us under worst
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+ * case.
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+ *
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+ * Choose 1300 as the maximum.
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+ */
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+#define LPC_MAX_WAITCNT 1300
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+
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+/* About 10us. This is specific for single IO operations, such as inb */
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+#define LPC_PEROP_WAITCNT 100
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+
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+static int wait_lpc_idle(unsigned char *mbase, unsigned int waitcnt)
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+{
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+ u32 status;
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+
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+ do {
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+ status = readl(mbase + LPC_REG_OP_STATUS);
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+ if (status & LPC_REG_OP_STATUS_IDLE)
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+ return (status & LPC_REG_OP_STATUS_FINISHED) ? 0 : -EIO;
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+ ndelay(LPC_NSEC_PERWAIT);
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+ } while (--waitcnt);
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+
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+ return -ETIME;
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+}
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+
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+/*
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+ * hisi_lpc_target_in - trigger a series of LPC cycles for read operation
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+ * @lpcdev: pointer to hisi lpc device
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+ * @para: some parameters used to control the lpc I/O operations
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+ * @addr: the lpc I/O target port address
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+ * @buf: where the read back data is stored
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+ * @opcnt: how many I/O operations required, i.e. data width
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+ *
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+ * Returns 0 on success, non-zero on fail.
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+ */
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+static int hisi_lpc_target_in(struct hisi_lpc_dev *lpcdev,
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+ struct lpc_cycle_para *para, unsigned long addr,
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+ unsigned char *buf, unsigned long opcnt)
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+{
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+ unsigned int cmd_word;
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+ unsigned int waitcnt;
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+ unsigned long flags;
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+ int ret;
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+
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+ if (!buf || !opcnt || !para || !para->csize || !lpcdev)
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+ return -EINVAL;
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+
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+ cmd_word = 0; /* IO mode, Read */
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+ waitcnt = LPC_PEROP_WAITCNT;
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+ if (!(para->opflags & FG_INCRADDR_LPC)) {
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+ cmd_word |= LPC_REG_CMD_SAMEADDR;
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+ waitcnt = LPC_MAX_WAITCNT;
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+ }
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+
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+ /* whole operation must be atomic */
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+ spin_lock_irqsave(&lpcdev->cycle_lock, flags);
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+
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+ writel_relaxed(opcnt, lpcdev->membase + LPC_REG_OP_LEN);
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+ writel_relaxed(cmd_word, lpcdev->membase + LPC_REG_CMD);
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+ writel_relaxed(addr, lpcdev->membase + LPC_REG_ADDR);
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+
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+ writel(LPC_REG_STARTUP_SIGNAL_START,
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+ lpcdev->membase + LPC_REG_STARTUP_SIGNAL);
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+
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+ /* whether the operation is finished */
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+ ret = wait_lpc_idle(lpcdev->membase, waitcnt);
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+ if (ret) {
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+ spin_unlock_irqrestore(&lpcdev->cycle_lock, flags);
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+ return ret;
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+ }
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+
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+ readsb(lpcdev->membase + LPC_REG_RDATA, buf, opcnt);
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+
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+ spin_unlock_irqrestore(&lpcdev->cycle_lock, flags);
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+
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+ return 0;
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+}
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+
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+/*
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+ * hisi_lpc_target_out - trigger a series of LPC cycles for write operation
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+ * @lpcdev: pointer to hisi lpc device
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+ * @para: some parameters used to control the lpc I/O operations
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+ * @addr: the lpc I/O target port address
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+ * @buf: where the data to be written is stored
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+ * @opcnt: how many I/O operations required, i.e. data width
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+ *
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+ * Returns 0 on success, non-zero on fail.
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+ */
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+static int hisi_lpc_target_out(struct hisi_lpc_dev *lpcdev,
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+ struct lpc_cycle_para *para, unsigned long addr,
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+ const unsigned char *buf, unsigned long opcnt)
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+{
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+ unsigned int waitcnt;
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+ unsigned long flags;
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+ u32 cmd_word;
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+ int ret;
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+
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+ if (!buf || !opcnt || !para || !lpcdev)
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+ return -EINVAL;
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+
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+ /* default is increasing address */
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+ cmd_word = LPC_REG_CMD_OP; /* IO mode, write */
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+ waitcnt = LPC_PEROP_WAITCNT;
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+ if (!(para->opflags & FG_INCRADDR_LPC)) {
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+ cmd_word |= LPC_REG_CMD_SAMEADDR;
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+ waitcnt = LPC_MAX_WAITCNT;
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+ }
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+
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+ spin_lock_irqsave(&lpcdev->cycle_lock, flags);
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+
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+ writel_relaxed(opcnt, lpcdev->membase + LPC_REG_OP_LEN);
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+ writel_relaxed(cmd_word, lpcdev->membase + LPC_REG_CMD);
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+ writel_relaxed(addr, lpcdev->membase + LPC_REG_ADDR);
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+
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+ writesb(lpcdev->membase + LPC_REG_WDATA, buf, opcnt);
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+
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+ writel(LPC_REG_STARTUP_SIGNAL_START,
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+ lpcdev->membase + LPC_REG_STARTUP_SIGNAL);
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+
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+ /* whether the operation is finished */
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+ ret = wait_lpc_idle(lpcdev->membase, waitcnt);
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+
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+ spin_unlock_irqrestore(&lpcdev->cycle_lock, flags);
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+
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+ return ret;
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+}
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+
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+static unsigned long hisi_lpc_pio_to_addr(struct hisi_lpc_dev *lpcdev,
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+ unsigned long pio)
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+{
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+ return pio - lpcdev->io_host->io_start + lpcdev->io_host->hw_start;
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+}
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+
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+/*
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+ * hisi_lpc_comm_in - input the data in a single operation
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+ * @hostdata: pointer to the device information relevant to LPC controller
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+ * @pio: the target I/O port address
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+ * @dwidth: the data length required to read from the target I/O port
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+ *
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+ * When success, data is returned. Otherwise, ~0 is returned.
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+ */
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+static u32 hisi_lpc_comm_in(void *hostdata, unsigned long pio, size_t dwidth)
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+{
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+ struct hisi_lpc_dev *lpcdev = hostdata;
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+ struct lpc_cycle_para iopara;
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+ unsigned long addr;
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+ u32 rd_data = 0;
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+ int ret;
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+
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+ if (!lpcdev || !dwidth || dwidth > LPC_MAX_DWIDTH)
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+ return ~0;
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+
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+ addr = hisi_lpc_pio_to_addr(lpcdev, pio);
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+
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+ iopara.opflags = FG_INCRADDR_LPC;
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+ iopara.csize = dwidth;
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+
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+ ret = hisi_lpc_target_in(lpcdev, &iopara, addr,
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+ (unsigned char *)&rd_data, dwidth);
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+ if (ret)
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+ return ~0;
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+
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+ return le32_to_cpu(rd_data);
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+}
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+
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+/*
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+ * hisi_lpc_comm_out - output the data in a single operation
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+ * @hostdata: pointer to the device information relevant to LPC controller
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+ * @pio: the target I/O port address
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+ * @val: a value to be output from caller, maximum is four bytes
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+ * @dwidth: the data width required writing to the target I/O port
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+ *
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+ * This function corresponds to out(b,w,l) only.
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+ */
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+static void hisi_lpc_comm_out(void *hostdata, unsigned long pio,
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+ u32 val, size_t dwidth)
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+{
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+ struct hisi_lpc_dev *lpcdev = hostdata;
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+ struct lpc_cycle_para iopara;
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+ const unsigned char *buf;
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+ unsigned long addr;
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+
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+ if (!lpcdev || !dwidth || dwidth > LPC_MAX_DWIDTH)
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+ return;
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+
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+ val = cpu_to_le32(val);
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+
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+ buf = (const unsigned char *)&val;
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+ addr = hisi_lpc_pio_to_addr(lpcdev, pio);
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+
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+ iopara.opflags = FG_INCRADDR_LPC;
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+ iopara.csize = dwidth;
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+
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+ hisi_lpc_target_out(lpcdev, &iopara, addr, buf, dwidth);
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+}
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+
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+/*
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+ * hisi_lpc_comm_ins - input the data in the buffer in multiple operations
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+ * @hostdata: pointer to the device information relevant to LPC controller
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+ * @pio: the target I/O port address
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+ * @buffer: a buffer where read/input data bytes are stored
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+ * @dwidth: the data width required writing to the target I/O port
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+ * @count: how many data units whose length is dwidth will be read
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+ *
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+ * When success, the data read back is stored in buffer pointed by buffer.
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+ * Returns 0 on success, -errno otherwise.
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+ */
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+static u32 hisi_lpc_comm_ins(void *hostdata, unsigned long pio, void *buffer,
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+ size_t dwidth, unsigned int count)
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+{
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+ struct hisi_lpc_dev *lpcdev = hostdata;
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+ unsigned char *buf = buffer;
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+ struct lpc_cycle_para iopara;
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+ unsigned long addr;
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+
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+ if (!lpcdev || !buf || !count || !dwidth || dwidth > LPC_MAX_DWIDTH)
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+ return -EINVAL;
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+
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+ iopara.opflags = 0;
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+ if (dwidth > 1)
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+ iopara.opflags |= FG_INCRADDR_LPC;
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+ iopara.csize = dwidth;
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+
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+ addr = hisi_lpc_pio_to_addr(lpcdev, pio);
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+
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+ do {
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+ int ret;
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+
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+ ret = hisi_lpc_target_in(lpcdev, &iopara, addr, buf, dwidth);
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+ if (ret)
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+ return ret;
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+ buf += dwidth;
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+ } while (--count);
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+
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+ return 0;
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+}
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+
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+/*
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+ * hisi_lpc_comm_outs - output the data in the buffer in multiple operations
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+ * @hostdata: pointer to the device information relevant to LPC controller
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+ * @pio: the target I/O port address
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+ * @buffer: a buffer where write/output data bytes are stored
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+ * @dwidth: the data width required writing to the target I/O port
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+ * @count: how many data units whose length is dwidth will be written
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+ */
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+static void hisi_lpc_comm_outs(void *hostdata, unsigned long pio,
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+ const void *buffer, size_t dwidth,
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+ unsigned int count)
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+{
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+ struct hisi_lpc_dev *lpcdev = hostdata;
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+ struct lpc_cycle_para iopara;
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+ const unsigned char *buf = buffer;
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+ unsigned long addr;
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+
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+ if (!lpcdev || !buf || !count || !dwidth || dwidth > LPC_MAX_DWIDTH)
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+ return;
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+
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+ iopara.opflags = 0;
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+ if (dwidth > 1)
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+ iopara.opflags |= FG_INCRADDR_LPC;
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+ iopara.csize = dwidth;
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+
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+ addr = hisi_lpc_pio_to_addr(lpcdev, pio);
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+ do {
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+ if (hisi_lpc_target_out(lpcdev, &iopara, addr, buf, dwidth))
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+ break;
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+ buf += dwidth;
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+ } while (--count);
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+}
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+
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+static const struct logic_pio_host_ops hisi_lpc_ops = {
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+ .in = hisi_lpc_comm_in,
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+ .out = hisi_lpc_comm_out,
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+ .ins = hisi_lpc_comm_ins,
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+ .outs = hisi_lpc_comm_outs,
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+};
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+
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+#ifdef CONFIG_ACPI
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+#define MFD_CHILD_NAME_PREFIX DRV_NAME"-"
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+#define MFD_CHILD_NAME_LEN (ACPI_ID_LEN + sizeof(MFD_CHILD_NAME_PREFIX) - 1)
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+
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+struct hisi_lpc_mfd_cell {
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+ struct mfd_cell_acpi_match acpi_match;
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+ char name[MFD_CHILD_NAME_LEN];
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+ char pnpid[ACPI_ID_LEN];
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+};
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+
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+static int hisi_lpc_acpi_xlat_io_res(struct acpi_device *adev,
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+ struct acpi_device *host,
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+ struct resource *res)
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+{
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+ unsigned long sys_port;
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+ resource_size_t len = resource_size(res);
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+
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+ sys_port = logic_pio_trans_hwaddr(&host->fwnode, res->start, len);
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+ if (sys_port == ~0UL)
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+ return -EFAULT;
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+
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+ res->start = sys_port;
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+ res->end = sys_port + len;
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+
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+ return 0;
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+}
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+
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+/*
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+ * hisi_lpc_acpi_set_io_res - set the resources for a child's MFD
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+ * @child: the device node to be updated the I/O resource
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+ * @hostdev: the device node associated with host controller
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+ * @res: double pointer to be set to the address of translated resources
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+ * @num_res: pointer to variable to hold the number of translated resources
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+ *
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+ * Returns 0 when successful, and a negative value for failure.
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+ *
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+ * For a given host controller, each child device will have an associated
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+ * host-relative address resource. This function will return the translated
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+ * logical PIO addresses for each child devices resources.
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+ */
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+static int hisi_lpc_acpi_set_io_res(struct device *child,
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+ struct device *hostdev,
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+ const struct resource **res, int *num_res)
|
|
|
+{
|
|
|
+ struct acpi_device *adev;
|
|
|
+ struct acpi_device *host;
|
|
|
+ struct resource_entry *rentry;
|
|
|
+ LIST_HEAD(resource_list);
|
|
|
+ struct resource *resources;
|
|
|
+ int count;
|
|
|
+ int i;
|
|
|
+
|
|
|
+ if (!child || !hostdev)
|
|
|
+ return -EINVAL;
|
|
|
+
|
|
|
+ host = to_acpi_device(hostdev);
|
|
|
+ adev = to_acpi_device(child);
|
|
|
+
|
|
|
+ if (!adev->status.present) {
|
|
|
+ dev_dbg(child, "device is not present\n");
|
|
|
+ return -EIO;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (acpi_device_enumerated(adev)) {
|
|
|
+ dev_dbg(child, "has been enumerated\n");
|
|
|
+ return -EIO;
|
|
|
+ }
|
|
|
+
|
|
|
+ /*
|
|
|
+ * The following code segment to retrieve the resources is common to
|
|
|
+ * acpi_create_platform_device(), so consider a common helper function
|
|
|
+ * in future.
|
|
|
+ */
|
|
|
+ count = acpi_dev_get_resources(adev, &resource_list, NULL, NULL);
|
|
|
+ if (count <= 0) {
|
|
|
+ dev_dbg(child, "failed to get resources\n");
|
|
|
+ return count ? count : -EIO;
|
|
|
+ }
|
|
|
+
|
|
|
+ resources = devm_kcalloc(hostdev, count, sizeof(*resources),
|
|
|
+ GFP_KERNEL);
|
|
|
+ if (!resources) {
|
|
|
+ dev_warn(hostdev, "could not allocate memory for %d resources\n",
|
|
|
+ count);
|
|
|
+ acpi_dev_free_resource_list(&resource_list);
|
|
|
+ return -ENOMEM;
|
|
|
+ }
|
|
|
+ count = 0;
|
|
|
+ list_for_each_entry(rentry, &resource_list, node)
|
|
|
+ resources[count++] = *rentry->res;
|
|
|
+
|
|
|
+ acpi_dev_free_resource_list(&resource_list);
|
|
|
+
|
|
|
+ /* translate the I/O resources */
|
|
|
+ for (i = 0; i < count; i++) {
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (!(resources[i].flags & IORESOURCE_IO))
|
|
|
+ continue;
|
|
|
+ ret = hisi_lpc_acpi_xlat_io_res(adev, host, &resources[i]);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(child, "translate IO range %pR failed (%d)\n",
|
|
|
+ &resources[i], ret);
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ *res = resources;
|
|
|
+ *num_res = count;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * hisi_lpc_acpi_probe - probe children for ACPI FW
|
|
|
+ * @hostdev: LPC host device pointer
|
|
|
+ *
|
|
|
+ * Returns 0 when successful, and a negative value for failure.
|
|
|
+ *
|
|
|
+ * Scan all child devices and create a per-device MFD with
|
|
|
+ * logical PIO translated IO resources.
|
|
|
+ */
|
|
|
+static int hisi_lpc_acpi_probe(struct device *hostdev)
|
|
|
+{
|
|
|
+ struct acpi_device *adev = ACPI_COMPANION(hostdev);
|
|
|
+ struct hisi_lpc_mfd_cell *hisi_lpc_mfd_cells;
|
|
|
+ struct mfd_cell *mfd_cells;
|
|
|
+ struct acpi_device *child;
|
|
|
+ int size, ret, count = 0, cell_num = 0;
|
|
|
+
|
|
|
+ list_for_each_entry(child, &adev->children, node)
|
|
|
+ cell_num++;
|
|
|
+
|
|
|
+ /* allocate the mfd cell and companion ACPI info, one per child */
|
|
|
+ size = sizeof(*mfd_cells) + sizeof(*hisi_lpc_mfd_cells);
|
|
|
+ mfd_cells = devm_kcalloc(hostdev, cell_num, size, GFP_KERNEL);
|
|
|
+ if (!mfd_cells)
|
|
|
+ return -ENOMEM;
|
|
|
+
|
|
|
+ hisi_lpc_mfd_cells = (struct hisi_lpc_mfd_cell *)&mfd_cells[cell_num];
|
|
|
+ /* Only consider the children of the host */
|
|
|
+ list_for_each_entry(child, &adev->children, node) {
|
|
|
+ struct mfd_cell *mfd_cell = &mfd_cells[count];
|
|
|
+ struct hisi_lpc_mfd_cell *hisi_lpc_mfd_cell =
|
|
|
+ &hisi_lpc_mfd_cells[count];
|
|
|
+ struct mfd_cell_acpi_match *acpi_match =
|
|
|
+ &hisi_lpc_mfd_cell->acpi_match;
|
|
|
+ char *name = hisi_lpc_mfd_cell[count].name;
|
|
|
+ char *pnpid = hisi_lpc_mfd_cell[count].pnpid;
|
|
|
+ struct mfd_cell_acpi_match match = {
|
|
|
+ .pnpid = pnpid,
|
|
|
+ };
|
|
|
+
|
|
|
+ /*
|
|
|
+ * For any instances of this host controller (Hip06 and Hip07
|
|
|
+ * are the only chipsets), we would not have multiple slaves
|
|
|
+ * with the same HID. And in any system we would have just one
|
|
|
+ * controller active. So don't worrry about MFD name clashes.
|
|
|
+ */
|
|
|
+ snprintf(name, MFD_CHILD_NAME_LEN, MFD_CHILD_NAME_PREFIX"%s",
|
|
|
+ acpi_device_hid(child));
|
|
|
+ snprintf(pnpid, ACPI_ID_LEN, "%s", acpi_device_hid(child));
|
|
|
+
|
|
|
+ memcpy(acpi_match, &match, sizeof(*acpi_match));
|
|
|
+ mfd_cell->name = name;
|
|
|
+ mfd_cell->acpi_match = acpi_match;
|
|
|
+
|
|
|
+ ret = hisi_lpc_acpi_set_io_res(&child->dev, &adev->dev,
|
|
|
+ &mfd_cell->resources,
|
|
|
+ &mfd_cell->num_resources);
|
|
|
+ if (ret) {
|
|
|
+ dev_warn(&child->dev, "set resource fail (%d)\n", ret);
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+ count++;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = mfd_add_devices(hostdev, PLATFORM_DEVID_NONE,
|
|
|
+ mfd_cells, cell_num, NULL, 0, NULL);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(hostdev, "failed to add mfd cells (%d)\n", ret);
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static const struct acpi_device_id hisi_lpc_acpi_match[] = {
|
|
|
+ {"HISI0191"},
|
|
|
+ {}
|
|
|
+};
|
|
|
+#else
|
|
|
+static int hisi_lpc_acpi_probe(struct device *dev)
|
|
|
+{
|
|
|
+ return -ENODEV;
|
|
|
+}
|
|
|
+#endif // CONFIG_ACPI
|
|
|
+
|
|
|
+/*
|
|
|
+ * hisi_lpc_probe - the probe callback function for hisi lpc host,
|
|
|
+ * will finish all the initialization.
|
|
|
+ * @pdev: the platform device corresponding to hisi lpc host
|
|
|
+ *
|
|
|
+ * Returns 0 on success, non-zero on fail.
|
|
|
+ */
|
|
|
+static int hisi_lpc_probe(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ struct device *dev = &pdev->dev;
|
|
|
+ struct acpi_device *acpi_device = ACPI_COMPANION(dev);
|
|
|
+ struct logic_pio_hwaddr *range;
|
|
|
+ struct hisi_lpc_dev *lpcdev;
|
|
|
+ resource_size_t io_end;
|
|
|
+ struct resource *res;
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ lpcdev = devm_kzalloc(dev, sizeof(*lpcdev), GFP_KERNEL);
|
|
|
+ if (!lpcdev)
|
|
|
+ return -ENOMEM;
|
|
|
+
|
|
|
+ spin_lock_init(&lpcdev->cycle_lock);
|
|
|
+
|
|
|
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
+ lpcdev->membase = devm_ioremap_resource(dev, res);
|
|
|
+ if (IS_ERR(lpcdev->membase))
|
|
|
+ return PTR_ERR(lpcdev->membase);
|
|
|
+
|
|
|
+ range = devm_kzalloc(dev, sizeof(*range), GFP_KERNEL);
|
|
|
+ if (!range)
|
|
|
+ return -ENOMEM;
|
|
|
+
|
|
|
+ range->fwnode = dev->fwnode;
|
|
|
+ range->flags = LOGIC_PIO_INDIRECT;
|
|
|
+ range->size = PIO_INDIRECT_SIZE;
|
|
|
+
|
|
|
+ ret = logic_pio_register_range(range);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(dev, "register IO range failed (%d)!\n", ret);
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+ lpcdev->io_host = range;
|
|
|
+
|
|
|
+ /* register the LPC host PIO resources */
|
|
|
+ if (acpi_device)
|
|
|
+ ret = hisi_lpc_acpi_probe(dev);
|
|
|
+ else
|
|
|
+ ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
|
|
|
+ if (ret)
|
|
|
+ return ret;
|
|
|
+
|
|
|
+ lpcdev->io_host->hostdata = lpcdev;
|
|
|
+ lpcdev->io_host->ops = &hisi_lpc_ops;
|
|
|
+
|
|
|
+ io_end = lpcdev->io_host->io_start + lpcdev->io_host->size;
|
|
|
+ dev_info(dev, "registered range [%pa - %pa]\n",
|
|
|
+ &lpcdev->io_host->io_start, &io_end);
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static const struct of_device_id hisi_lpc_of_match[] = {
|
|
|
+ { .compatible = "hisilicon,hip06-lpc", },
|
|
|
+ { .compatible = "hisilicon,hip07-lpc", },
|
|
|
+ {}
|
|
|
+};
|
|
|
+
|
|
|
+static struct platform_driver hisi_lpc_driver = {
|
|
|
+ .driver = {
|
|
|
+ .name = DRV_NAME,
|
|
|
+ .of_match_table = hisi_lpc_of_match,
|
|
|
+ .acpi_match_table = ACPI_PTR(hisi_lpc_acpi_match),
|
|
|
+ },
|
|
|
+ .probe = hisi_lpc_probe,
|
|
|
+};
|
|
|
+builtin_platform_driver(hisi_lpc_driver);
|
Bjorn Helgaas