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@@ -1,6 +1,10 @@
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/*
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* exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
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*
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+ * Copyright (C) 2014 Samsung Electronics
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+ * Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
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+ * Lukasz Majewski <l.majewski@samsung.com>
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+ *
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* Copyright (C) 2011 Samsung Electronics
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* Donggeun Kim <dg77.kim@samsung.com>
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* Amit Daniel Kachhap <amit.kachhap@linaro.org>
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@@ -31,8 +35,8 @@
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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-#include "exynos_thermal_common.h"
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#include "exynos_tmu.h"
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+#include "../thermal_core.h"
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/* Exynos generic registers */
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#define EXYNOS_TMU_REG_TRIMINFO 0x0
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@@ -115,6 +119,27 @@
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#define EXYNOS5440_TMU_TH_RISE4_SHIFT 24
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#define EXYNOS5440_EFUSE_SWAP_OFFSET 8
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+/* Exynos7 specific registers */
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+#define EXYNOS7_THD_TEMP_RISE7_6 0x50
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+#define EXYNOS7_THD_TEMP_FALL7_6 0x60
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+#define EXYNOS7_TMU_REG_INTEN 0x110
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+#define EXYNOS7_TMU_REG_INTPEND 0x118
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+#define EXYNOS7_TMU_REG_EMUL_CON 0x160
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+
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+#define EXYNOS7_TMU_TEMP_MASK 0x1ff
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+#define EXYNOS7_PD_DET_EN_SHIFT 23
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+#define EXYNOS7_TMU_INTEN_RISE0_SHIFT 0
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+#define EXYNOS7_TMU_INTEN_RISE1_SHIFT 1
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+#define EXYNOS7_TMU_INTEN_RISE2_SHIFT 2
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+#define EXYNOS7_TMU_INTEN_RISE3_SHIFT 3
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+#define EXYNOS7_TMU_INTEN_RISE4_SHIFT 4
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+#define EXYNOS7_TMU_INTEN_RISE5_SHIFT 5
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+#define EXYNOS7_TMU_INTEN_RISE6_SHIFT 6
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+#define EXYNOS7_TMU_INTEN_RISE7_SHIFT 7
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+#define EXYNOS7_EMUL_DATA_SHIFT 7
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+#define EXYNOS7_EMUL_DATA_MASK 0x1ff
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+
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+#define MCELSIUS 1000
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/**
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* struct exynos_tmu_data : A structure to hold the private data of the TMU
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driver
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@@ -128,6 +153,7 @@
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* @lock: lock to implement synchronization.
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* @clk: pointer to the clock structure.
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* @clk_sec: pointer to the clock structure for accessing the base_second.
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+ * @sclk: pointer to the clock structure for accessing the tmu special clk.
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* @temp_error1: fused value of the first point trim.
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* @temp_error2: fused value of the second point trim.
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* @regulator: pointer to the TMU regulator structure.
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@@ -147,10 +173,11 @@ struct exynos_tmu_data {
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enum soc_type soc;
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struct work_struct irq_work;
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struct mutex lock;
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- struct clk *clk, *clk_sec;
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- u8 temp_error1, temp_error2;
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+ struct clk *clk, *clk_sec, *sclk;
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+ u16 temp_error1, temp_error2;
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struct regulator *regulator;
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- struct thermal_sensor_conf *reg_conf;
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+ struct thermal_zone_device *tzd;
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+
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int (*tmu_initialize)(struct platform_device *pdev);
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void (*tmu_control)(struct platform_device *pdev, bool on);
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int (*tmu_read)(struct exynos_tmu_data *data);
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@@ -159,6 +186,33 @@ struct exynos_tmu_data {
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void (*tmu_clear_irqs)(struct exynos_tmu_data *data);
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};
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+static void exynos_report_trigger(struct exynos_tmu_data *p)
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+{
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+ char data[10], *envp[] = { data, NULL };
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+ struct thermal_zone_device *tz = p->tzd;
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+ unsigned long temp;
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+ unsigned int i;
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+
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+ if (!tz) {
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+ pr_err("No thermal zone device defined\n");
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+ return;
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+ }
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+
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+ thermal_zone_device_update(tz);
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+
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+ mutex_lock(&tz->lock);
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+ /* Find the level for which trip happened */
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+ for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
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+ tz->ops->get_trip_temp(tz, i, &temp);
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+ if (tz->last_temperature < temp)
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+ break;
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+ }
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+
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+ snprintf(data, sizeof(data), "%u", i);
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+ kobject_uevent_env(&tz->device.kobj, KOBJ_CHANGE, envp);
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+ mutex_unlock(&tz->lock);
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+}
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+
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/*
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* TMU treats temperature as a mapped temperature code.
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* The temperature is converted differently depending on the calibration type.
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@@ -190,7 +244,7 @@ static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
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* Calculate a temperature value from a temperature code.
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* The unit of the temperature is degree Celsius.
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*/
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-static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
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+static int code_to_temp(struct exynos_tmu_data *data, u16 temp_code)
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{
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struct exynos_tmu_platform_data *pdata = data->pdata;
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int temp;
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@@ -234,14 +288,25 @@ static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info)
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static u32 get_th_reg(struct exynos_tmu_data *data, u32 threshold, bool falling)
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{
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- struct exynos_tmu_platform_data *pdata = data->pdata;
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+ struct thermal_zone_device *tz = data->tzd;
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+ const struct thermal_trip * const trips =
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+ of_thermal_get_trip_points(tz);
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+ unsigned long temp;
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int i;
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- for (i = 0; i < pdata->non_hw_trigger_levels; i++) {
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- u8 temp = pdata->trigger_levels[i];
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+ if (!trips) {
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+ pr_err("%s: Cannot get trip points from of-thermal.c!\n",
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+ __func__);
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+ return 0;
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+ }
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+
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+ for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
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+ if (trips[i].type == THERMAL_TRIP_CRITICAL)
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+ continue;
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+ temp = trips[i].temperature / MCELSIUS;
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if (falling)
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- temp -= pdata->threshold_falling;
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+ temp -= (trips[i].hysteresis / MCELSIUS);
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else
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threshold &= ~(0xff << 8 * i);
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@@ -305,9 +370,19 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on)
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static int exynos4210_tmu_initialize(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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- struct exynos_tmu_platform_data *pdata = data->pdata;
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- unsigned int status;
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+ struct thermal_zone_device *tz = data->tzd;
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+ const struct thermal_trip * const trips =
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+ of_thermal_get_trip_points(tz);
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int ret = 0, threshold_code, i;
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+ unsigned long reference, temp;
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+ unsigned int status;
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+
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+ if (!trips) {
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+ pr_err("%s: Cannot get trip points from of-thermal.c!\n",
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+ __func__);
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+ ret = -ENODEV;
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+ goto out;
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+ }
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status = readb(data->base + EXYNOS_TMU_REG_STATUS);
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if (!status) {
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@@ -318,12 +393,19 @@ static int exynos4210_tmu_initialize(struct platform_device *pdev)
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sanitize_temp_error(data, readl(data->base + EXYNOS_TMU_REG_TRIMINFO));
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/* Write temperature code for threshold */
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- threshold_code = temp_to_code(data, pdata->threshold);
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+ reference = trips[0].temperature / MCELSIUS;
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+ threshold_code = temp_to_code(data, reference);
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+ if (threshold_code < 0) {
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+ ret = threshold_code;
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+ goto out;
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+ }
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writeb(threshold_code, data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
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- for (i = 0; i < pdata->non_hw_trigger_levels; i++)
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- writeb(pdata->trigger_levels[i], data->base +
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+ for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
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+ temp = trips[i].temperature / MCELSIUS;
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+ writeb(temp - reference, data->base +
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EXYNOS4210_TMU_REG_TRIG_LEVEL0 + i * 4);
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+ }
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data->tmu_clear_irqs(data);
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out:
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@@ -333,9 +415,11 @@ out:
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static int exynos4412_tmu_initialize(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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- struct exynos_tmu_platform_data *pdata = data->pdata;
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+ const struct thermal_trip * const trips =
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+ of_thermal_get_trip_points(data->tzd);
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unsigned int status, trim_info, con, ctrl, rising_threshold;
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int ret = 0, threshold_code, i;
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+ unsigned long crit_temp = 0;
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status = readb(data->base + EXYNOS_TMU_REG_STATUS);
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if (!status) {
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@@ -373,17 +457,29 @@ static int exynos4412_tmu_initialize(struct platform_device *pdev)
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data->tmu_clear_irqs(data);
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/* if last threshold limit is also present */
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- i = pdata->max_trigger_level - 1;
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- if (pdata->trigger_levels[i] && pdata->trigger_type[i] == HW_TRIP) {
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- threshold_code = temp_to_code(data, pdata->trigger_levels[i]);
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- /* 1-4 level to be assigned in th0 reg */
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- rising_threshold &= ~(0xff << 8 * i);
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- rising_threshold |= threshold_code << 8 * i;
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- writel(rising_threshold, data->base + EXYNOS_THD_TEMP_RISE);
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- con = readl(data->base + EXYNOS_TMU_REG_CONTROL);
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- con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT);
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- writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
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+ for (i = 0; i < of_thermal_get_ntrips(data->tzd); i++) {
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+ if (trips[i].type == THERMAL_TRIP_CRITICAL) {
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+ crit_temp = trips[i].temperature;
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+ break;
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+ }
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}
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+
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+ if (i == of_thermal_get_ntrips(data->tzd)) {
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+ pr_err("%s: No CRITICAL trip point defined at of-thermal.c!\n",
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+ __func__);
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+ ret = -EINVAL;
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+ goto out;
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+ }
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+
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+ threshold_code = temp_to_code(data, crit_temp / MCELSIUS);
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+ /* 1-4 level to be assigned in th0 reg */
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+ rising_threshold &= ~(0xff << 8 * i);
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+ rising_threshold |= threshold_code << 8 * i;
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+ writel(rising_threshold, data->base + EXYNOS_THD_TEMP_RISE);
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+ con = readl(data->base + EXYNOS_TMU_REG_CONTROL);
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+ con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT);
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+ writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
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+
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out:
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return ret;
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}
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@@ -391,9 +487,9 @@ out:
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static int exynos5440_tmu_initialize(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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- struct exynos_tmu_platform_data *pdata = data->pdata;
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unsigned int trim_info = 0, con, rising_threshold;
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- int ret = 0, threshold_code, i;
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+ int ret = 0, threshold_code;
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+ unsigned long crit_temp = 0;
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/*
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* For exynos5440 soc triminfo value is swapped between TMU0 and
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@@ -422,9 +518,8 @@ static int exynos5440_tmu_initialize(struct platform_device *pdev)
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data->tmu_clear_irqs(data);
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/* if last threshold limit is also present */
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- i = pdata->max_trigger_level - 1;
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- if (pdata->trigger_levels[i] && pdata->trigger_type[i] == HW_TRIP) {
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- threshold_code = temp_to_code(data, pdata->trigger_levels[i]);
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+ if (!data->tzd->ops->get_crit_temp(data->tzd, &crit_temp)) {
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+ threshold_code = temp_to_code(data, crit_temp / MCELSIUS);
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/* 5th level to be assigned in th2 reg */
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rising_threshold =
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threshold_code << EXYNOS5440_TMU_TH_RISE4_SHIFT;
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@@ -439,10 +534,88 @@ static int exynos5440_tmu_initialize(struct platform_device *pdev)
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return ret;
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}
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-static void exynos4210_tmu_control(struct platform_device *pdev, bool on)
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+static int exynos7_tmu_initialize(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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+ struct thermal_zone_device *tz = data->tzd;
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struct exynos_tmu_platform_data *pdata = data->pdata;
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+ unsigned int status, trim_info;
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+ unsigned int rising_threshold = 0, falling_threshold = 0;
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+ int ret = 0, threshold_code, i;
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+ unsigned long temp, temp_hist;
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+ unsigned int reg_off, bit_off;
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+
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+ status = readb(data->base + EXYNOS_TMU_REG_STATUS);
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+ if (!status) {
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+ ret = -EBUSY;
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+ goto out;
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+ }
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+
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+ trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
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+
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+ data->temp_error1 = trim_info & EXYNOS7_TMU_TEMP_MASK;
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+ if (!data->temp_error1 ||
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+ (pdata->min_efuse_value > data->temp_error1) ||
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+ (data->temp_error1 > pdata->max_efuse_value))
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+ data->temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK;
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+
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+ /* Write temperature code for rising and falling threshold */
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+ for (i = (of_thermal_get_ntrips(tz) - 1); i >= 0; i--) {
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+ /*
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+ * On exynos7 there are 4 rising and 4 falling threshold
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+ * registers (0x50-0x5c and 0x60-0x6c respectively). Each
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+ * register holds the value of two threshold levels (at bit
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+ * offsets 0 and 16). Based on the fact that there are atmost
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+ * eight possible trigger levels, calculate the register and
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+ * bit offsets where the threshold levels are to be written.
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+ *
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+ * e.g. EXYNOS7_THD_TEMP_RISE7_6 (0x50)
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+ * [24:16] - Threshold level 7
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+ * [8:0] - Threshold level 6
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+ * e.g. EXYNOS7_THD_TEMP_RISE5_4 (0x54)
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+ * [24:16] - Threshold level 5
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+ * [8:0] - Threshold level 4
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+ *
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+ * and similarly for falling thresholds.
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+ *
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+ * Based on the above, calculate the register and bit offsets
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+ * for rising/falling threshold levels and populate them.
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+ */
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+ reg_off = ((7 - i) / 2) * 4;
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+ bit_off = ((8 - i) % 2);
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+
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+ tz->ops->get_trip_temp(tz, i, &temp);
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+ temp /= MCELSIUS;
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+
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+ tz->ops->get_trip_hyst(tz, i, &temp_hist);
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+ temp_hist = temp - (temp_hist / MCELSIUS);
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+
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+ /* Set 9-bit temperature code for rising threshold levels */
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+ threshold_code = temp_to_code(data, temp);
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+ rising_threshold = readl(data->base +
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+ EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
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+ rising_threshold &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off));
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+ rising_threshold |= threshold_code << (16 * bit_off);
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+ writel(rising_threshold,
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+ data->base + EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
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+
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+ /* Set 9-bit temperature code for falling threshold levels */
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+ threshold_code = temp_to_code(data, temp_hist);
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+ falling_threshold &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off));
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+ falling_threshold |= threshold_code << (16 * bit_off);
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+ writel(falling_threshold,
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+ data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
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+ }
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+
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+ data->tmu_clear_irqs(data);
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+out:
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+ return ret;
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+}
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+
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+static void exynos4210_tmu_control(struct platform_device *pdev, bool on)
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+{
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+ struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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+ struct thermal_zone_device *tz = data->tzd;
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unsigned int con, interrupt_en;
|
|
|
|
|
|
con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
|
|
|
@@ -450,10 +623,15 @@ static void exynos4210_tmu_control(struct platform_device *pdev, bool on)
|
|
|
if (on) {
|
|
|
con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
|
|
|
interrupt_en =
|
|
|
- pdata->trigger_enable[3] << EXYNOS_TMU_INTEN_RISE3_SHIFT |
|
|
|
- pdata->trigger_enable[2] << EXYNOS_TMU_INTEN_RISE2_SHIFT |
|
|
|
- pdata->trigger_enable[1] << EXYNOS_TMU_INTEN_RISE1_SHIFT |
|
|
|
- pdata->trigger_enable[0] << EXYNOS_TMU_INTEN_RISE0_SHIFT;
|
|
|
+ (of_thermal_is_trip_valid(tz, 3)
|
|
|
+ << EXYNOS_TMU_INTEN_RISE3_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 2)
|
|
|
+ << EXYNOS_TMU_INTEN_RISE2_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 1)
|
|
|
+ << EXYNOS_TMU_INTEN_RISE1_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 0)
|
|
|
+ << EXYNOS_TMU_INTEN_RISE0_SHIFT);
|
|
|
+
|
|
|
if (data->soc != SOC_ARCH_EXYNOS4210)
|
|
|
interrupt_en |=
|
|
|
interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
|
|
|
@@ -468,7 +646,7 @@ static void exynos4210_tmu_control(struct platform_device *pdev, bool on)
|
|
|
static void exynos5440_tmu_control(struct platform_device *pdev, bool on)
|
|
|
{
|
|
|
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
|
|
|
- struct exynos_tmu_platform_data *pdata = data->pdata;
|
|
|
+ struct thermal_zone_device *tz = data->tzd;
|
|
|
unsigned int con, interrupt_en;
|
|
|
|
|
|
con = get_con_reg(data, readl(data->base + EXYNOS5440_TMU_S0_7_CTRL));
|
|
|
@@ -476,11 +654,16 @@ static void exynos5440_tmu_control(struct platform_device *pdev, bool on)
|
|
|
if (on) {
|
|
|
con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
|
|
|
interrupt_en =
|
|
|
- pdata->trigger_enable[3] << EXYNOS5440_TMU_INTEN_RISE3_SHIFT |
|
|
|
- pdata->trigger_enable[2] << EXYNOS5440_TMU_INTEN_RISE2_SHIFT |
|
|
|
- pdata->trigger_enable[1] << EXYNOS5440_TMU_INTEN_RISE1_SHIFT |
|
|
|
- pdata->trigger_enable[0] << EXYNOS5440_TMU_INTEN_RISE0_SHIFT;
|
|
|
- interrupt_en |= interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT;
|
|
|
+ (of_thermal_is_trip_valid(tz, 3)
|
|
|
+ << EXYNOS5440_TMU_INTEN_RISE3_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 2)
|
|
|
+ << EXYNOS5440_TMU_INTEN_RISE2_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 1)
|
|
|
+ << EXYNOS5440_TMU_INTEN_RISE1_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 0)
|
|
|
+ << EXYNOS5440_TMU_INTEN_RISE0_SHIFT);
|
|
|
+ interrupt_en |=
|
|
|
+ interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT;
|
|
|
} else {
|
|
|
con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
|
|
|
interrupt_en = 0; /* Disable all interrupts */
|
|
|
@@ -489,19 +672,62 @@ static void exynos5440_tmu_control(struct platform_device *pdev, bool on)
|
|
|
writel(con, data->base + EXYNOS5440_TMU_S0_7_CTRL);
|
|
|
}
|
|
|
|
|
|
-static int exynos_tmu_read(struct exynos_tmu_data *data)
|
|
|
+static void exynos7_tmu_control(struct platform_device *pdev, bool on)
|
|
|
{
|
|
|
- int ret;
|
|
|
+ struct exynos_tmu_data *data = platform_get_drvdata(pdev);
|
|
|
+ struct thermal_zone_device *tz = data->tzd;
|
|
|
+ unsigned int con, interrupt_en;
|
|
|
+
|
|
|
+ con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
|
|
|
+
|
|
|
+ if (on) {
|
|
|
+ con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
|
|
|
+ interrupt_en =
|
|
|
+ (of_thermal_is_trip_valid(tz, 7)
|
|
|
+ << EXYNOS7_TMU_INTEN_RISE7_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 6)
|
|
|
+ << EXYNOS7_TMU_INTEN_RISE6_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 5)
|
|
|
+ << EXYNOS7_TMU_INTEN_RISE5_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 4)
|
|
|
+ << EXYNOS7_TMU_INTEN_RISE4_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 3)
|
|
|
+ << EXYNOS7_TMU_INTEN_RISE3_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 2)
|
|
|
+ << EXYNOS7_TMU_INTEN_RISE2_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 1)
|
|
|
+ << EXYNOS7_TMU_INTEN_RISE1_SHIFT) |
|
|
|
+ (of_thermal_is_trip_valid(tz, 0)
|
|
|
+ << EXYNOS7_TMU_INTEN_RISE0_SHIFT);
|
|
|
+
|
|
|
+ interrupt_en |=
|
|
|
+ interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
|
|
|
+ } else {
|
|
|
+ con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
|
|
|
+ interrupt_en = 0; /* Disable all interrupts */
|
|
|
+ }
|
|
|
+ con |= 1 << EXYNOS7_PD_DET_EN_SHIFT;
|
|
|
+
|
|
|
+ writel(interrupt_en, data->base + EXYNOS7_TMU_REG_INTEN);
|
|
|
+ writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
|
|
|
+}
|
|
|
+
|
|
|
+static int exynos_get_temp(void *p, long *temp)
|
|
|
+{
|
|
|
+ struct exynos_tmu_data *data = p;
|
|
|
+
|
|
|
+ if (!data)
|
|
|
+ return -EINVAL;
|
|
|
|
|
|
mutex_lock(&data->lock);
|
|
|
clk_enable(data->clk);
|
|
|
- ret = data->tmu_read(data);
|
|
|
- if (ret >= 0)
|
|
|
- ret = code_to_temp(data, ret);
|
|
|
+
|
|
|
+ *temp = code_to_temp(data, data->tmu_read(data)) * MCELSIUS;
|
|
|
+
|
|
|
clk_disable(data->clk);
|
|
|
mutex_unlock(&data->lock);
|
|
|
|
|
|
- return ret;
|
|
|
+ return 0;
|
|
|
}
|
|
|
|
|
|
#ifdef CONFIG_THERMAL_EMULATION
|
|
|
@@ -515,9 +741,19 @@ static u32 get_emul_con_reg(struct exynos_tmu_data *data, unsigned int val,
|
|
|
val &= ~(EXYNOS_EMUL_TIME_MASK << EXYNOS_EMUL_TIME_SHIFT);
|
|
|
val |= (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT);
|
|
|
}
|
|
|
- val &= ~(EXYNOS_EMUL_DATA_MASK << EXYNOS_EMUL_DATA_SHIFT);
|
|
|
- val |= (temp_to_code(data, temp) << EXYNOS_EMUL_DATA_SHIFT) |
|
|
|
- EXYNOS_EMUL_ENABLE;
|
|
|
+ if (data->soc == SOC_ARCH_EXYNOS7) {
|
|
|
+ val &= ~(EXYNOS7_EMUL_DATA_MASK <<
|
|
|
+ EXYNOS7_EMUL_DATA_SHIFT);
|
|
|
+ val |= (temp_to_code(data, temp) <<
|
|
|
+ EXYNOS7_EMUL_DATA_SHIFT) |
|
|
|
+ EXYNOS_EMUL_ENABLE;
|
|
|
+ } else {
|
|
|
+ val &= ~(EXYNOS_EMUL_DATA_MASK <<
|
|
|
+ EXYNOS_EMUL_DATA_SHIFT);
|
|
|
+ val |= (temp_to_code(data, temp) <<
|
|
|
+ EXYNOS_EMUL_DATA_SHIFT) |
|
|
|
+ EXYNOS_EMUL_ENABLE;
|
|
|
+ }
|
|
|
} else {
|
|
|
val &= ~EXYNOS_EMUL_ENABLE;
|
|
|
}
|
|
|
@@ -533,6 +769,8 @@ static void exynos4412_tmu_set_emulation(struct exynos_tmu_data *data,
|
|
|
|
|
|
if (data->soc == SOC_ARCH_EXYNOS5260)
|
|
|
emul_con = EXYNOS5260_EMUL_CON;
|
|
|
+ else if (data->soc == SOC_ARCH_EXYNOS7)
|
|
|
+ emul_con = EXYNOS7_TMU_REG_EMUL_CON;
|
|
|
else
|
|
|
emul_con = EXYNOS_EMUL_CON;
|
|
|
|
|
|
@@ -576,7 +814,7 @@ out:
|
|
|
#define exynos5440_tmu_set_emulation NULL
|
|
|
static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)
|
|
|
{ return -EINVAL; }
|
|
|
-#endif/*CONFIG_THERMAL_EMULATION*/
|
|
|
+#endif /* CONFIG_THERMAL_EMULATION */
|
|
|
|
|
|
static int exynos4210_tmu_read(struct exynos_tmu_data *data)
|
|
|
{
|
|
|
@@ -596,6 +834,12 @@ static int exynos5440_tmu_read(struct exynos_tmu_data *data)
|
|
|
return readb(data->base + EXYNOS5440_TMU_S0_7_TEMP);
|
|
|
}
|
|
|
|
|
|
+static int exynos7_tmu_read(struct exynos_tmu_data *data)
|
|
|
+{
|
|
|
+ return readw(data->base + EXYNOS_TMU_REG_CURRENT_TEMP) &
|
|
|
+ EXYNOS7_TMU_TEMP_MASK;
|
|
|
+}
|
|
|
+
|
|
|
static void exynos_tmu_work(struct work_struct *work)
|
|
|
{
|
|
|
struct exynos_tmu_data *data = container_of(work,
|
|
|
@@ -613,7 +857,7 @@ static void exynos_tmu_work(struct work_struct *work)
|
|
|
if (!IS_ERR(data->clk_sec))
|
|
|
clk_disable(data->clk_sec);
|
|
|
|
|
|
- exynos_report_trigger(data->reg_conf);
|
|
|
+ exynos_report_trigger(data);
|
|
|
mutex_lock(&data->lock);
|
|
|
clk_enable(data->clk);
|
|
|
|
|
|
@@ -634,6 +878,9 @@ static void exynos4210_tmu_clear_irqs(struct exynos_tmu_data *data)
|
|
|
if (data->soc == SOC_ARCH_EXYNOS5260) {
|
|
|
tmu_intstat = EXYNOS5260_TMU_REG_INTSTAT;
|
|
|
tmu_intclear = EXYNOS5260_TMU_REG_INTCLEAR;
|
|
|
+ } else if (data->soc == SOC_ARCH_EXYNOS7) {
|
|
|
+ tmu_intstat = EXYNOS7_TMU_REG_INTPEND;
|
|
|
+ tmu_intclear = EXYNOS7_TMU_REG_INTPEND;
|
|
|
} else {
|
|
|
tmu_intstat = EXYNOS_TMU_REG_INTSTAT;
|
|
|
tmu_intclear = EXYNOS_TMU_REG_INTCLEAR;
|
|
|
@@ -673,55 +920,94 @@ static irqreturn_t exynos_tmu_irq(int irq, void *id)
|
|
|
static const struct of_device_id exynos_tmu_match[] = {
|
|
|
{
|
|
|
.compatible = "samsung,exynos3250-tmu",
|
|
|
- .data = &exynos3250_default_tmu_data,
|
|
|
},
|
|
|
{
|
|
|
.compatible = "samsung,exynos4210-tmu",
|
|
|
- .data = &exynos4210_default_tmu_data,
|
|
|
},
|
|
|
{
|
|
|
.compatible = "samsung,exynos4412-tmu",
|
|
|
- .data = &exynos4412_default_tmu_data,
|
|
|
},
|
|
|
{
|
|
|
.compatible = "samsung,exynos5250-tmu",
|
|
|
- .data = &exynos5250_default_tmu_data,
|
|
|
},
|
|
|
{
|
|
|
.compatible = "samsung,exynos5260-tmu",
|
|
|
- .data = &exynos5260_default_tmu_data,
|
|
|
},
|
|
|
{
|
|
|
.compatible = "samsung,exynos5420-tmu",
|
|
|
- .data = &exynos5420_default_tmu_data,
|
|
|
},
|
|
|
{
|
|
|
.compatible = "samsung,exynos5420-tmu-ext-triminfo",
|
|
|
- .data = &exynos5420_default_tmu_data,
|
|
|
},
|
|
|
{
|
|
|
.compatible = "samsung,exynos5440-tmu",
|
|
|
- .data = &exynos5440_default_tmu_data,
|
|
|
+ },
|
|
|
+ {
|
|
|
+ .compatible = "samsung,exynos7-tmu",
|
|
|
},
|
|
|
{},
|
|
|
};
|
|
|
MODULE_DEVICE_TABLE(of, exynos_tmu_match);
|
|
|
|
|
|
-static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
|
|
|
- struct platform_device *pdev, int id)
|
|
|
+static int exynos_of_get_soc_type(struct device_node *np)
|
|
|
+{
|
|
|
+ if (of_device_is_compatible(np, "samsung,exynos3250-tmu"))
|
|
|
+ return SOC_ARCH_EXYNOS3250;
|
|
|
+ else if (of_device_is_compatible(np, "samsung,exynos4210-tmu"))
|
|
|
+ return SOC_ARCH_EXYNOS4210;
|
|
|
+ else if (of_device_is_compatible(np, "samsung,exynos4412-tmu"))
|
|
|
+ return SOC_ARCH_EXYNOS4412;
|
|
|
+ else if (of_device_is_compatible(np, "samsung,exynos5250-tmu"))
|
|
|
+ return SOC_ARCH_EXYNOS5250;
|
|
|
+ else if (of_device_is_compatible(np, "samsung,exynos5260-tmu"))
|
|
|
+ return SOC_ARCH_EXYNOS5260;
|
|
|
+ else if (of_device_is_compatible(np, "samsung,exynos5420-tmu"))
|
|
|
+ return SOC_ARCH_EXYNOS5420;
|
|
|
+ else if (of_device_is_compatible(np,
|
|
|
+ "samsung,exynos5420-tmu-ext-triminfo"))
|
|
|
+ return SOC_ARCH_EXYNOS5420_TRIMINFO;
|
|
|
+ else if (of_device_is_compatible(np, "samsung,exynos5440-tmu"))
|
|
|
+ return SOC_ARCH_EXYNOS5440;
|
|
|
+ else if (of_device_is_compatible(np, "samsung,exynos7-tmu"))
|
|
|
+ return SOC_ARCH_EXYNOS7;
|
|
|
+
|
|
|
+ return -EINVAL;
|
|
|
+}
|
|
|
+
|
|
|
+static int exynos_of_sensor_conf(struct device_node *np,
|
|
|
+ struct exynos_tmu_platform_data *pdata)
|
|
|
{
|
|
|
- struct exynos_tmu_init_data *data_table;
|
|
|
- struct exynos_tmu_platform_data *tmu_data;
|
|
|
- const struct of_device_id *match;
|
|
|
+ u32 value;
|
|
|
+ int ret;
|
|
|
|
|
|
- match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
|
|
|
- if (!match)
|
|
|
- return NULL;
|
|
|
- data_table = (struct exynos_tmu_init_data *) match->data;
|
|
|
- if (!data_table || id >= data_table->tmu_count)
|
|
|
- return NULL;
|
|
|
- tmu_data = data_table->tmu_data;
|
|
|
- return (struct exynos_tmu_platform_data *) (tmu_data + id);
|
|
|
+ of_node_get(np);
|
|
|
+
|
|
|
+ ret = of_property_read_u32(np, "samsung,tmu_gain", &value);
|
|
|
+ pdata->gain = (u8)value;
|
|
|
+ of_property_read_u32(np, "samsung,tmu_reference_voltage", &value);
|
|
|
+ pdata->reference_voltage = (u8)value;
|
|
|
+ of_property_read_u32(np, "samsung,tmu_noise_cancel_mode", &value);
|
|
|
+ pdata->noise_cancel_mode = (u8)value;
|
|
|
+
|
|
|
+ of_property_read_u32(np, "samsung,tmu_efuse_value",
|
|
|
+ &pdata->efuse_value);
|
|
|
+ of_property_read_u32(np, "samsung,tmu_min_efuse_value",
|
|
|
+ &pdata->min_efuse_value);
|
|
|
+ of_property_read_u32(np, "samsung,tmu_max_efuse_value",
|
|
|
+ &pdata->max_efuse_value);
|
|
|
+
|
|
|
+ of_property_read_u32(np, "samsung,tmu_first_point_trim", &value);
|
|
|
+ pdata->first_point_trim = (u8)value;
|
|
|
+ of_property_read_u32(np, "samsung,tmu_second_point_trim", &value);
|
|
|
+ pdata->second_point_trim = (u8)value;
|
|
|
+ of_property_read_u32(np, "samsung,tmu_default_temp_offset", &value);
|
|
|
+ pdata->default_temp_offset = (u8)value;
|
|
|
+
|
|
|
+ of_property_read_u32(np, "samsung,tmu_cal_type", &pdata->cal_type);
|
|
|
+ of_property_read_u32(np, "samsung,tmu_cal_mode", &pdata->cal_mode);
|
|
|
+
|
|
|
+ of_node_put(np);
|
|
|
+ return 0;
|
|
|
}
|
|
|
|
|
|
static int exynos_map_dt_data(struct platform_device *pdev)
|
|
|
@@ -771,14 +1057,15 @@ static int exynos_map_dt_data(struct platform_device *pdev)
|
|
|
return -EADDRNOTAVAIL;
|
|
|
}
|
|
|
|
|
|
- pdata = exynos_get_driver_data(pdev, data->id);
|
|
|
- if (!pdata) {
|
|
|
- dev_err(&pdev->dev, "No platform init data supplied.\n");
|
|
|
- return -ENODEV;
|
|
|
- }
|
|
|
+ pdata = devm_kzalloc(&pdev->dev,
|
|
|
+ sizeof(struct exynos_tmu_platform_data),
|
|
|
+ GFP_KERNEL);
|
|
|
+ if (!pdata)
|
|
|
+ return -ENOMEM;
|
|
|
|
|
|
+ exynos_of_sensor_conf(pdev->dev.of_node, pdata);
|
|
|
data->pdata = pdata;
|
|
|
- data->soc = pdata->type;
|
|
|
+ data->soc = exynos_of_get_soc_type(pdev->dev.of_node);
|
|
|
|
|
|
switch (data->soc) {
|
|
|
case SOC_ARCH_EXYNOS4210:
|
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@@ -806,6 +1093,13 @@ static int exynos_map_dt_data(struct platform_device *pdev)
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data->tmu_set_emulation = exynos5440_tmu_set_emulation;
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data->tmu_clear_irqs = exynos5440_tmu_clear_irqs;
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break;
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+ case SOC_ARCH_EXYNOS7:
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+ data->tmu_initialize = exynos7_tmu_initialize;
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+ data->tmu_control = exynos7_tmu_control;
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+ data->tmu_read = exynos7_tmu_read;
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+ data->tmu_set_emulation = exynos4412_tmu_set_emulation;
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+ data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
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+ break;
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default:
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dev_err(&pdev->dev, "Platform not supported\n");
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return -EINVAL;
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@@ -834,12 +1128,16 @@ static int exynos_map_dt_data(struct platform_device *pdev)
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return 0;
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}
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+static struct thermal_zone_of_device_ops exynos_sensor_ops = {
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+ .get_temp = exynos_get_temp,
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+ .set_emul_temp = exynos_tmu_set_emulation,
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+};
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+
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static int exynos_tmu_probe(struct platform_device *pdev)
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{
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- struct exynos_tmu_data *data;
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struct exynos_tmu_platform_data *pdata;
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- struct thermal_sensor_conf *sensor_conf;
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- int ret, i;
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+ struct exynos_tmu_data *data;
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+ int ret;
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data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
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GFP_KERNEL);
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@@ -849,9 +1147,15 @@ static int exynos_tmu_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, data);
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mutex_init(&data->lock);
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+ data->tzd = thermal_zone_of_sensor_register(&pdev->dev, 0, data,
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+ &exynos_sensor_ops);
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+ if (IS_ERR(data->tzd)) {
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+ pr_err("thermal: tz: %p ERROR\n", data->tzd);
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+ return PTR_ERR(data->tzd);
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+ }
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ret = exynos_map_dt_data(pdev);
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if (ret)
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- return ret;
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+ goto err_sensor;
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pdata = data->pdata;
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@@ -860,20 +1164,22 @@ static int exynos_tmu_probe(struct platform_device *pdev)
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data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
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if (IS_ERR(data->clk)) {
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dev_err(&pdev->dev, "Failed to get clock\n");
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- return PTR_ERR(data->clk);
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+ ret = PTR_ERR(data->clk);
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+ goto err_sensor;
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}
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data->clk_sec = devm_clk_get(&pdev->dev, "tmu_triminfo_apbif");
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if (IS_ERR(data->clk_sec)) {
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if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) {
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dev_err(&pdev->dev, "Failed to get triminfo clock\n");
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- return PTR_ERR(data->clk_sec);
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+ ret = PTR_ERR(data->clk_sec);
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+ goto err_sensor;
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}
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} else {
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ret = clk_prepare(data->clk_sec);
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if (ret) {
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dev_err(&pdev->dev, "Failed to get clock\n");
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- return ret;
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+ goto err_sensor;
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}
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}
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@@ -883,82 +1189,57 @@ static int exynos_tmu_probe(struct platform_device *pdev)
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goto err_clk_sec;
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}
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- ret = exynos_tmu_initialize(pdev);
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- if (ret) {
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- dev_err(&pdev->dev, "Failed to initialize TMU\n");
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- goto err_clk;
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+ if (data->soc == SOC_ARCH_EXYNOS7) {
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+ data->sclk = devm_clk_get(&pdev->dev, "tmu_sclk");
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+ if (IS_ERR(data->sclk)) {
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+ dev_err(&pdev->dev, "Failed to get sclk\n");
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+ goto err_clk;
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+ } else {
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+ ret = clk_prepare_enable(data->sclk);
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+ if (ret) {
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+ dev_err(&pdev->dev, "Failed to enable sclk\n");
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+ goto err_clk;
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+ }
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+ }
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}
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- exynos_tmu_control(pdev, true);
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-
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- /* Allocate a structure to register with the exynos core thermal */
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- sensor_conf = devm_kzalloc(&pdev->dev,
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- sizeof(struct thermal_sensor_conf), GFP_KERNEL);
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- if (!sensor_conf) {
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- ret = -ENOMEM;
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- goto err_clk;
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- }
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- sprintf(sensor_conf->name, "therm_zone%d", data->id);
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- sensor_conf->read_temperature = (int (*)(void *))exynos_tmu_read;
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- sensor_conf->write_emul_temp =
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- (int (*)(void *, unsigned long))exynos_tmu_set_emulation;
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- sensor_conf->driver_data = data;
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- sensor_conf->trip_data.trip_count = pdata->trigger_enable[0] +
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- pdata->trigger_enable[1] + pdata->trigger_enable[2]+
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- pdata->trigger_enable[3];
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-
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- for (i = 0; i < sensor_conf->trip_data.trip_count; i++) {
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- sensor_conf->trip_data.trip_val[i] =
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- pdata->threshold + pdata->trigger_levels[i];
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- sensor_conf->trip_data.trip_type[i] =
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- pdata->trigger_type[i];
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- }
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-
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- sensor_conf->trip_data.trigger_falling = pdata->threshold_falling;
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-
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- sensor_conf->cooling_data.freq_clip_count = pdata->freq_tab_count;
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- for (i = 0; i < pdata->freq_tab_count; i++) {
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- sensor_conf->cooling_data.freq_data[i].freq_clip_max =
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- pdata->freq_tab[i].freq_clip_max;
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- sensor_conf->cooling_data.freq_data[i].temp_level =
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- pdata->freq_tab[i].temp_level;
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- }
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- sensor_conf->dev = &pdev->dev;
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- /* Register the sensor with thermal management interface */
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- ret = exynos_register_thermal(sensor_conf);
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+ ret = exynos_tmu_initialize(pdev);
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if (ret) {
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- if (ret != -EPROBE_DEFER)
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- dev_err(&pdev->dev,
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- "Failed to register thermal interface: %d\n",
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- ret);
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- goto err_clk;
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+ dev_err(&pdev->dev, "Failed to initialize TMU\n");
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+ goto err_sclk;
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}
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- data->reg_conf = sensor_conf;
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ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
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IRQF_TRIGGER_RISING | IRQF_SHARED, dev_name(&pdev->dev), data);
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if (ret) {
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dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
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- goto err_clk;
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+ goto err_sclk;
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}
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+ exynos_tmu_control(pdev, true);
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return 0;
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+err_sclk:
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+ clk_disable_unprepare(data->sclk);
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err_clk:
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clk_unprepare(data->clk);
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err_clk_sec:
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if (!IS_ERR(data->clk_sec))
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clk_unprepare(data->clk_sec);
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+err_sensor:
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+ thermal_zone_of_sensor_unregister(&pdev->dev, data->tzd);
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+
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return ret;
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}
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static int exynos_tmu_remove(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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+ struct thermal_zone_device *tzd = data->tzd;
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- exynos_unregister_thermal(data->reg_conf);
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-
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+ thermal_zone_of_sensor_unregister(&pdev->dev, tzd);
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exynos_tmu_control(pdev, false);
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+ clk_disable_unprepare(data->sclk);
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clk_unprepare(data->clk);
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if (!IS_ERR(data->clk_sec))
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clk_unprepare(data->clk_sec);
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Linus Torvalds