|
@@ -121,7 +121,7 @@ uint amdgpu_pg_mask = 0xffffffff;
|
|
uint amdgpu_sdma_phase_quantum = 32;
|
|
uint amdgpu_sdma_phase_quantum = 32;
|
|
char *amdgpu_disable_cu = NULL;
|
|
char *amdgpu_disable_cu = NULL;
|
|
char *amdgpu_virtual_display = NULL;
|
|
char *amdgpu_virtual_display = NULL;
|
|
-uint amdgpu_pp_feature_mask = 0x3fff;
|
|
|
|
|
|
+uint amdgpu_pp_feature_mask = 0xffffbfff;
|
|
int amdgpu_ngg = 0;
|
|
int amdgpu_ngg = 0;
|
|
int amdgpu_prim_buf_per_se = 0;
|
|
int amdgpu_prim_buf_per_se = 0;
|
|
int amdgpu_pos_buf_per_se = 0;
|
|
int amdgpu_pos_buf_per_se = 0;
|