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@@ -1,7 +1,7 @@
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/*
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* Dynamic function tracer architecture backend.
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*
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- * Copyright IBM Corp. 2009
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+ * Copyright IBM Corp. 2009,2014
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*
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* Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>,
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* Martin Schwidefsky <schwidefsky@de.ibm.com>
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@@ -17,6 +17,7 @@
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#include <asm/asm-offsets.h>
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#include "entry.h"
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+void mcount_replace_code(void);
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void ftrace_disable_code(void);
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void ftrace_enable_insn(void);
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@@ -24,38 +25,50 @@ void ftrace_enable_insn(void);
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/*
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* The 64-bit mcount code looks like this:
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* stg %r14,8(%r15) # offset 0
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- * > larl %r1,<&counter> # offset 6
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- * > brasl %r14,_mcount # offset 12
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+ * larl %r1,<&counter> # offset 6
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+ * brasl %r14,_mcount # offset 12
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* lg %r14,8(%r15) # offset 18
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- * Total length is 24 bytes. The middle two instructions of the mcount
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- * block get overwritten by ftrace_make_nop / ftrace_make_call.
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+ * Total length is 24 bytes. The complete mcount block initially gets replaced
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+ * by ftrace_make_nop. Subsequent calls to ftrace_make_call / ftrace_make_nop
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+ * only patch the jg/lg instruction within the block.
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+ * Note: we do not patch the first instruction to an unconditional branch,
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+ * since that would break kprobes/jprobes. It is easier to leave the larl
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+ * instruction in and only modify the second instruction.
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* The 64-bit enabled ftrace code block looks like this:
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- * stg %r14,8(%r15) # offset 0
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+ * larl %r0,.+24 # offset 0
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* > lg %r1,__LC_FTRACE_FUNC # offset 6
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- * > lgr %r0,%r0 # offset 12
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- * > basr %r14,%r1 # offset 16
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- * lg %r14,8(%15) # offset 18
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- * The return points of the mcount/ftrace function have the same offset 18.
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- * The 64-bit disable ftrace code block looks like this:
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- * stg %r14,8(%r15) # offset 0
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+ * br %r1 # offset 12
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+ * brcl 0,0 # offset 14
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+ * brc 0,0 # offset 20
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+ * The ftrace function gets called with a non-standard C function call ABI
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+ * where r0 contains the return address. It is also expected that the called
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+ * function only clobbers r0 and r1, but restores r2-r15.
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+ * The return point of the ftrace function has offset 24, so execution
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+ * continues behind the mcount block.
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+ * larl %r0,.+24 # offset 0
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* > jg .+18 # offset 6
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- * > lgr %r0,%r0 # offset 12
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- * > basr %r14,%r1 # offset 16
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- * lg %r14,8(%15) # offset 18
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+ * br %r1 # offset 12
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+ * brcl 0,0 # offset 14
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+ * brc 0,0 # offset 20
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* The jg instruction branches to offset 24 to skip as many instructions
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* as possible.
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*/
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asm(
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" .align 4\n"
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+ "mcount_replace_code:\n"
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+ " larl %r0,0f\n"
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"ftrace_disable_code:\n"
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" jg 0f\n"
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- " lgr %r0,%r0\n"
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- " basr %r14,%r1\n"
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+ " br %r1\n"
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+ " brcl 0,0\n"
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+ " brc 0,0\n"
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"0:\n"
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" .align 4\n"
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"ftrace_enable_insn:\n"
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" lg %r1,"__stringify(__LC_FTRACE_FUNC)"\n");
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+#define MCOUNT_BLOCK_SIZE 24
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+#define MCOUNT_INSN_OFFSET 6
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#define FTRACE_INSN_SIZE 6
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#else /* CONFIG_64BIT */
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@@ -116,6 +129,16 @@ int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr,
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int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec,
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unsigned long addr)
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{
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+#ifdef CONFIG_64BIT
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+ /* Initial replacement of the whole mcount block */
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+ if (addr == MCOUNT_ADDR) {
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+ if (probe_kernel_write((void *) rec->ip - MCOUNT_INSN_OFFSET,
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+ mcount_replace_code,
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+ MCOUNT_BLOCK_SIZE))
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+ return -EPERM;
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+ return 0;
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+ }
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+#endif
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if (probe_kernel_write((void *) rec->ip, ftrace_disable_code,
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MCOUNT_INSN_SIZE))
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return -EPERM;
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Heiko Carstens