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@@ -3638,6 +3638,10 @@ static int ci_setup_default_dpm_tables(struct amdgpu_device *adev)
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ci_setup_default_pcie_tables(adev);
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+ /* save a copy of the default DPM table */
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+ memcpy(&(pi->golden_dpm_table), &(pi->dpm_table),
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+ sizeof(struct ci_dpm_table));
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+
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return 0;
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}
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@@ -6526,6 +6530,40 @@ static int ci_dpm_force_clock_level(struct amdgpu_device *adev,
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return 0;
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}
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+static int ci_dpm_get_sclk_od(struct amdgpu_device *adev)
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+{
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+ struct ci_power_info *pi = ci_get_pi(adev);
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+ struct ci_single_dpm_table *sclk_table = &(pi->dpm_table.sclk_table);
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+ struct ci_single_dpm_table *golden_sclk_table =
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+ &(pi->golden_dpm_table.sclk_table);
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+ int value;
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+
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+ value = (sclk_table->dpm_levels[sclk_table->count - 1].value -
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+ golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value) *
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+ 100 /
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+ golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value;
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+
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+ return value;
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+}
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+
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+static int ci_dpm_set_sclk_od(struct amdgpu_device *adev, uint32_t value)
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+{
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+ struct ci_power_info *pi = ci_get_pi(adev);
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+ struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps);
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+ struct ci_single_dpm_table *golden_sclk_table =
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+ &(pi->golden_dpm_table.sclk_table);
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+
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+ if (value > 20)
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+ value = 20;
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+
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+ ps->performance_levels[ps->performance_level_count - 1].sclk =
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+ golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value *
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+ value / 100 +
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+ golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value;
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+
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+ return 0;
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+}
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+
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const struct amd_ip_funcs ci_dpm_ip_funcs = {
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.name = "ci_dpm",
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.early_init = ci_dpm_early_init,
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@@ -6562,6 +6600,8 @@ static const struct amdgpu_dpm_funcs ci_dpm_funcs = {
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.get_fan_speed_percent = &ci_dpm_get_fan_speed_percent,
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.print_clock_levels = ci_dpm_print_clock_levels,
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.force_clock_level = ci_dpm_force_clock_level,
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+ .get_sclk_od = ci_dpm_get_sclk_od,
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+ .set_sclk_od = ci_dpm_set_sclk_od,
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};
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static void ci_dpm_set_dpm_funcs(struct amdgpu_device *adev)
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