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@@ -267,7 +267,7 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_tua9001[] = {
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{DVBT_OPT_ADC_IQ, 0x1},
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{DVBT_AD_AVI, 0x0},
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{DVBT_AD_AVQ, 0x0},
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- {DVBT_SPEC_INV, 0x0},
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+ {DVBT_SPEC_INV, 0x0},
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};
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static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
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@@ -301,7 +301,7 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
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{DVBT_GI_PGA_STATE, 0x0},
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{DVBT_EN_AGC_PGA, 0x1},
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{DVBT_IF_AGC_MAN, 0x0},
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- {DVBT_SPEC_INV, 0x0},
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+ {DVBT_SPEC_INV, 0x0},
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};
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static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = {
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@@ -339,32 +339,32 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = {
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{DVBT_REG_MONSEL, 0x1},
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{DVBT_REG_MON, 0x1},
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{DVBT_REG_4MSEL, 0x0},
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- {DVBT_SPEC_INV, 0x0},
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+ {DVBT_SPEC_INV, 0x0},
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};
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static const struct rtl2832_reg_value rtl2832_tuner_init_r820t[] = {
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- {DVBT_DAGC_TRG_VAL, 0x39},
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- {DVBT_AGC_TARG_VAL_0, 0x0},
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- {DVBT_AGC_TARG_VAL_8_1, 0x40},
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- {DVBT_AAGC_LOOP_GAIN, 0x16},
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- {DVBT_LOOP_GAIN2_3_0, 0x8},
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- {DVBT_LOOP_GAIN2_4, 0x1},
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- {DVBT_LOOP_GAIN3, 0x18},
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- {DVBT_VTOP1, 0x35},
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- {DVBT_VTOP2, 0x21},
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- {DVBT_VTOP3, 0x21},
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- {DVBT_KRF1, 0x0},
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- {DVBT_KRF2, 0x40},
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- {DVBT_KRF3, 0x10},
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- {DVBT_KRF4, 0x10},
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- {DVBT_IF_AGC_MIN, 0x80},
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- {DVBT_IF_AGC_MAX, 0x7f},
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- {DVBT_RF_AGC_MIN, 0x80},
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- {DVBT_RF_AGC_MAX, 0x7f},
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- {DVBT_POLAR_RF_AGC, 0x0},
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- {DVBT_POLAR_IF_AGC, 0x0},
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- {DVBT_AD7_SETTING, 0xe9f4},
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- {DVBT_SPEC_INV, 0x1},
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+ {DVBT_DAGC_TRG_VAL, 0x39},
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+ {DVBT_AGC_TARG_VAL_0, 0x0},
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+ {DVBT_AGC_TARG_VAL_8_1, 0x40},
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+ {DVBT_AAGC_LOOP_GAIN, 0x16},
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+ {DVBT_LOOP_GAIN2_3_0, 0x8},
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+ {DVBT_LOOP_GAIN2_4, 0x1},
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+ {DVBT_LOOP_GAIN3, 0x18},
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+ {DVBT_VTOP1, 0x35},
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+ {DVBT_VTOP2, 0x21},
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+ {DVBT_VTOP3, 0x21},
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+ {DVBT_KRF1, 0x0},
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+ {DVBT_KRF2, 0x40},
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+ {DVBT_KRF3, 0x10},
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+ {DVBT_KRF4, 0x10},
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+ {DVBT_IF_AGC_MIN, 0x80},
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+ {DVBT_IF_AGC_MAX, 0x7f},
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+ {DVBT_RF_AGC_MIN, 0x80},
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+ {DVBT_RF_AGC_MAX, 0x7f},
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+ {DVBT_POLAR_RF_AGC, 0x0},
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+ {DVBT_POLAR_IF_AGC, 0x0},
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+ {DVBT_AD7_SETTING, 0xe9f4},
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+ {DVBT_SPEC_INV, 0x1},
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};
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#endif /* RTL2832_PRIV_H */
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