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@@ -1001,6 +1001,28 @@ void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
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ps->sclk_high, ps->max_voltage);
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}
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+/* get the current sclk in 10 khz units */
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+u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev)
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+{
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+ u32 current_fb_div = RREG32(FVTHROT_STATUS_REG0) & CURRENT_FEEDBACK_DIV_MASK;
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+ u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL);
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+ u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;
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+ u32 post_div = ((func_cntl & SPLL_SW_HILEN_MASK) >> SPLL_SW_HILEN_SHIFT) + 1 +
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+ ((func_cntl & SPLL_SW_LOLEN_MASK) >> SPLL_SW_LOLEN_SHIFT) + 1;
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+ u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) /
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+ (post_div * ref_div);
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+
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+ return sclk;
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+}
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+
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+/* get the current mclk in 10 khz units */
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+u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev)
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+{
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+ struct igp_power_info *pi = rs780_get_pi(rdev);
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+
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+ return pi->bootup_uma_clk;
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+}
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+
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int rs780_dpm_force_performance_level(struct radeon_device *rdev,
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enum radeon_dpm_forced_level level)
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{
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