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drm/amd/display: using calculated values for VReady/Startup

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu %!s(int64=8) %!d(string=hai) anos
pai
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3c8c9d6cd1

+ 9 - 0
drivers/gpu/drm/amd/display/dc/dc_hw_types.h

@@ -28,6 +28,7 @@
 
 #include "os_types.h"
 #include "fixed31_32.h"
+#include "signal_types.h"
 
 /******************************************************************************
  * Data types for Virtual HW Layer of DAL3.
@@ -647,5 +648,13 @@ struct dc_crtc_timing {
 	struct dc_crtc_timing_flags flags;
 };
 
+struct _dlg_otg_param {
+	int vstartup_start;
+	int vupdate_offset;
+	int vupdate_width;
+	int vready_offset;
+	enum signal_type signal;
+};
+
 #endif /* DC_HW_TYPES_H */
 

+ 2 - 0
drivers/gpu/drm/amd/display/dc/dm_services_types.h

@@ -180,6 +180,8 @@ struct dm_pp_display_configuration {
 
 	uint32_t avail_mclk_switch_time_us;
 	uint32_t avail_mclk_switch_time_in_disp_active_us;
+	uint32_t min_dcfclock_khz;
+	uint32_t min_dcfc_deep_sleep_clock_khz;
 
 	uint32_t disp_clk_khz;
 

+ 0 - 1
drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

@@ -96,7 +96,6 @@ enum crtc_state {
 	CRTC_STATE_VBLANK = 0,
 	CRTC_STATE_VACTIVE
 };
-
 struct timing_generator {
 	const struct timing_generator_funcs *funcs;
 	struct dc_bios *bp;

+ 1 - 0
drivers/gpu/drm/amd/display/include/logger_types.h

@@ -63,6 +63,7 @@ enum dc_log_type {
 	LOG_EVENT_LINK_LOSS,
 	LOG_EVENT_UNDERFLOW,
 	LOG_IF_TRACE,
+	LOG_HW_MARKS,
 
 	LOG_SECTION_TOTAL_COUNT
 };