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@@ -1493,6 +1493,13 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
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dw->regs = chip->regs;
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chip->dw = dw;
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+ dw->clk = devm_clk_get(chip->dev, "hclk");
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+ if (IS_ERR(dw->clk))
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+ return PTR_ERR(dw->clk);
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+ err = clk_prepare_enable(dw->clk);
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+ if (err)
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+ return err;
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+
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dw_params = dma_read_byaddr(chip->regs, DW_PARAMS);
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autocfg = dw_params >> DW_PARAMS_EN & 0x1;
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@@ -1500,15 +1507,19 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
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if (!pdata && autocfg) {
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pdata = devm_kzalloc(chip->dev, sizeof(*pdata), GFP_KERNEL);
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- if (!pdata)
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- return -ENOMEM;
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+ if (!pdata) {
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+ err = -ENOMEM;
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+ goto err_pdata;
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+ }
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/* Fill platform data with the default values */
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pdata->is_private = true;
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pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING;
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pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
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- } else if (!pdata || pdata->nr_channels > DW_DMA_MAX_NR_CHANNELS)
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- return -EINVAL;
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+ } else if (!pdata || pdata->nr_channels > DW_DMA_MAX_NR_CHANNELS) {
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+ err = -EINVAL;
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+ goto err_pdata;
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+ }
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if (autocfg)
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nr_channels = (dw_params >> DW_PARAMS_NR_CHAN & 0x7) + 1;
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@@ -1517,13 +1528,10 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
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dw->chan = devm_kcalloc(chip->dev, nr_channels, sizeof(*dw->chan),
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GFP_KERNEL);
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- if (!dw->chan)
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- return -ENOMEM;
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-
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- dw->clk = devm_clk_get(chip->dev, "hclk");
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- if (IS_ERR(dw->clk))
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- return PTR_ERR(dw->clk);
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- clk_prepare_enable(dw->clk);
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+ if (!dw->chan) {
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+ err = -ENOMEM;
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+ goto err_pdata;
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+ }
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/* Get hardware configuration parameters */
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if (autocfg) {
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@@ -1548,21 +1556,22 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
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/* Disable BLOCK interrupts as well */
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channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);
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- err = devm_request_irq(chip->dev, chip->irq, dw_dma_interrupt,
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- IRQF_SHARED, "dw_dmac", dw);
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- if (err)
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- return err;
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-
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/* Create a pool of consistent memory blocks for hardware descriptors */
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dw->desc_pool = dmam_pool_create("dw_dmac_desc_pool", chip->dev,
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sizeof(struct dw_desc), 4, 0);
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if (!dw->desc_pool) {
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dev_err(chip->dev, "No memory for descriptors dma pool\n");
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- return -ENOMEM;
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+ err = -ENOMEM;
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+ goto err_pdata;
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}
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tasklet_init(&dw->tasklet, dw_dma_tasklet, (unsigned long)dw);
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+ err = request_irq(chip->irq, dw_dma_interrupt, IRQF_SHARED,
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+ "dw_dmac", dw);
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+ if (err)
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+ goto err_pdata;
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+
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INIT_LIST_HEAD(&dw->dma.channels);
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for (i = 0; i < nr_channels; i++) {
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struct dw_dma_chan *dwc = &dw->chan[i];
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@@ -1650,12 +1659,20 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
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dma_writel(dw, CFG, DW_CFG_DMA_EN);
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+ err = dma_async_device_register(&dw->dma);
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+ if (err)
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+ goto err_dma_register;
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+
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dev_info(chip->dev, "DesignWare DMA Controller, %d channels\n",
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nr_channels);
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- dma_async_device_register(&dw->dma);
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-
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return 0;
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+
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+err_dma_register:
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+ free_irq(chip->irq, dw);
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+err_pdata:
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+ clk_disable_unprepare(dw->clk);
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+ return err;
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}
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EXPORT_SYMBOL_GPL(dw_dma_probe);
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@@ -1667,6 +1684,7 @@ int dw_dma_remove(struct dw_dma_chip *chip)
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dw_dma_off(dw);
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dma_async_device_unregister(&dw->dma);
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+ free_irq(chip->irq, dw);
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tasklet_kill(&dw->tasklet);
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list_for_each_entry_safe(dwc, _dwc, &dw->dma.channels,
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@@ -1675,6 +1693,8 @@ int dw_dma_remove(struct dw_dma_chip *chip)
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channel_clear_bit(dw, CH_EN, dwc->mask);
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}
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+ clk_disable_unprepare(dw->clk);
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+
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return 0;
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}
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EXPORT_SYMBOL_GPL(dw_dma_remove);
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