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@@ -261,6 +261,14 @@ configured less than Maximum supported fifo bytes */
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UART_FCR7_64BYTE,
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UART_FCR7_64BYTE,
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.flags = UART_CAP_FIFO,
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.flags = UART_CAP_FIFO,
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},
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},
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+ [PORT_RT2880] = {
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+ .name = "Palmchip BK-3103",
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+ .fifo_size = 16,
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+ .tx_loadsz = 16,
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+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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+ .rxtrig_bytes = {1, 4, 8, 14},
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+ .flags = UART_CAP_FIFO,
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+ },
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};
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};
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/* Uart divisor latch read */
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/* Uart divisor latch read */
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