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@@ -4049,6 +4049,18 @@ static int octeon_device_init(struct octeon_device *octeon_dev)
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atomic_set(&octeon_dev->status, OCT_DEV_INTR_SET_DONE);
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+ /* Send Credit for Octeon Output queues. Credits are always sent BEFORE
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+ * the output queue is enabled.
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+ * This ensures that we'll receive the f/w CORE DRV_ACTIVE message in
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+ * case we've configured CN23XX_SLI_GBL_CONTROL[NOPTR_D] = 0.
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+ * Otherwise, it is possible that the DRV_ACTIVE message will be sent
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+ * before any credits have been issued, causing the ring to be reset
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+ * (and the f/w appear to never have started).
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+ */
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+ for (j = 0; j < octeon_dev->num_oqs; j++)
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+ writel(octeon_dev->droq[j]->max_count,
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+ octeon_dev->droq[j]->pkts_credit_reg);
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+
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/* Enable the input and output queues for this Octeon device */
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ret = octeon_dev->fn_list.enable_io_queues(octeon_dev);
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if (ret) {
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@@ -4133,14 +4145,6 @@ static int octeon_device_init(struct octeon_device *octeon_dev)
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atomic_set(&octeon_dev->status, OCT_DEV_HOST_OK);
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- /* Send Credit for Octeon Output queues. Credits are always sent after
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- * the output queue is enabled.
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- */
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- for (j = 0; j < octeon_dev->num_oqs; j++)
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- writel(octeon_dev->droq[j]->max_count,
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- octeon_dev->droq[j]->pkts_credit_reg);
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-
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- /* Packets can start arriving on the output queues from this point. */
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return 0;
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}
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